Research On Verification Method Of DSP Operation Unit In FPGA Chip

In recent years,with the rapid development of application scenarios such as AI,IOT,big data acceleration,and scientific computing,the demand for online data processing capabilities has increased.FPGA has been widely used in new fields due to its advantages such as low cost,programmable and parallel computing.It relies heavily on the embedded programmable DSP module in FPGA chip.For the higher performance,smaller layout size,lower power consumption oriented FPGA chip,DSP module is often developed by a fullycustomized design manner currently.But the traditional function verification methods for the fully-customized design has many shortcomings in the verification efficiency,the incentive completeness,the evaluation verification progress,etc,which leads to the functional verification for the fully-customized DSP module has become a bottleneck which restricts that the FPGA chip can be delivered to customers or market on schedule.However,currently there are no uniform solution for solving the shortcomings in functional verification of fully-customized design.This research is based on a FPGA chip project during my internship company.In order to cope with the difficulties and challenges brought by the function verification of the traditional fully-customized design,aiming at improving the simulation verification efficiency and accurately evaluating the verification progress,a solution for function verification of fully-customized DSP is proposed in this paper.Firstly,a solution for function verification of fully-customized DSP module and a series of evaluation indicators which is used to multi-faceted evaluate the verification scheme is proposed based on a research on the architecture and the verification strategy of the fullycustomized DSP module Then,a behavior level model for the fully-customized DSP module is developed,and an equivalence check scheme which is used to check the equivalence between the behavior level model of the DSP module and the SPICE netlist of the DSP module is proposed.After that,the verification environment and the test cases which are used to construct the verification scenarios for the design feature are be developed based on the functional verification solution for fully-customized design,combined with the current semi-customized functional verification strategy and UVM verification methodology.Finally,we analyzes the function coverage and design defect growth curve which are used to evaluate the completeness of the function verification,and ensures that the function coverage reaches 100% and the design defect growth curve tends to converge.The DSP module has been integrated into several FPGA chips in the internship company.Up to now,one FPGA chip which contains the fully-customized DSP module has been taped out,and no obvious functional defects have been found in the post-silicon test.After analyzing and comparing the data results of each evaluation indicator under two different verification schemes,it can be concluded that the new scheme proposed in this paper can shorten the incentive generation time by 66% and improve the verification efficiency by 33.3% compared with the traditional fully-customized functional verification scheme,and the verification progress can be quantified by using functional coverage and design defect convergence curves.This new fully-customized functional verification scheme proposed in this paper has certain guiding significance for solving the difficulties and challenges in the function verification of the fully-customized design in the current industry.