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Research And Design Of A New Type Of Ferroelectric Memory

Posted on:2020-03-03Degree:MasterType:Thesis
Country:ChinaCandidate:S WangFull Text:PDF
GTID:2428330596476343Subject:Engineering
Abstract/Summary:PDF Full Text Request
In order to adapt to the increasing data demands of modern society,a flexible and fast non-volatile memory is essential.A new type of ferroelectric memory with doped hafnium dioxide as ferroelectric material has been proposed to meet such a demand.The meaning of the new ferroelectric memory is that the ferroelectric memory made of new ferroelectric material.As the integrated circuit industry enters the deep submicron era,ferroelectric material in ferroelectric memory also needs to be updated to meet the requirements of the new process.The innovation of this paper is that doped hafnium oxide is chosen as ferroelectric material to complete the design of ferroelectric memory.Firstly,the process and properties of doped hafnium dioxide prepared by laboratories global in recent years were listed.Two sets of samples were prepared with annealing conditions of 400? and 550?.The hysteresis loops of the two samples were tested.It was found out that the samples which is annealed at 550? performs better.In order to study the fatigue characteristics of the two groups of samples,a triangular wave signal of 10 kHz was added to the two samples.After a certain time,the remanent polarization of the two samples was re-measured.The results were also that the samples which is annealed at 550? performs better.According to the hysteresis loop test of the ferroelectric capacitor,the approximate function model of the hysteresis loop is fitted,and the HSIM simulation model of the ferroelectric capacitor is established.Theoretical derivation and quantitative calculation of the differential voltage on the bit lines when the 2T2 C type ferroelectric memory cell is connected with different bit line capacitances.From the calculation results,the bit line capacitance matched by 2T2 C type ferroelectric memory cell has an optimal with the bit-line-line capacitances of around 2 pF,the differencial voltage on the bit lines when reading data is the largest,about 773 mV.Based on this result,the memory array design of the memory is completed,and the overall circuit design of the memory is finished.Functional simulation of the designed circuit at 25?,-55?,150?,found that the ferroelectric memory can complete the expected read and write functions.The layout of the ferroelectric memory is designed according to the designed circuit diagram.In the design of the layout,the design of the storage array is simplified by using the common ferroelectric capacitor bottom electrode as the panel line.Due to the linear deviation of the manufacturing process,the circuit environment of the differential bit lines is different,which is easy to cause read and write errors.The interference of adjacent line read and write operations on the bit lines may also cause the memory work abnormally.By designing the differential bit line for the adjacent rows in the layout,the different circuit environment of differential bit lines in the same row caused by two reasons is avoided to the greatest extent,and data errors are also avoided.This paper introduces the principle of ferroelectric memory,the process and test of ferroelectric capacitor,circuit design of ferroelectric memory,and layout design of ferroelectric memory.The main innovation of this paper is to use new ferroelectric materials.the work described in this paper and future test results provides a basis for subsequent improvements in the design and process of the ferroelectric memory chip.
Keywords/Search Tags:Ferroelectric memory, hafnium dioxide, bit line capacitance
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