Research On The Custom Instruction Mapping Of Application Specific Instruction Set Processors

In the work flow of embedded systems,the design of application specific instruction set processor(ASIP)provides an available solution to obtain high performance without losing flexibility.In this design,a critical technology is custom instruction,which can directly affect the performance of whole system.One major work is custom instruction mapping.It is responsible for identifying the portions of target application program which match with custom instructions.And an optimal set of matching subgraphs is selected for ASIP to implement instruction covering.However,as target applications get more complex,it would cost a lot of time in the matching process and make the mapping of ASIP less efficient.In addition,traditional custom instruction mapping approaches would not consider the overlap of matching subgraphs and the problem of mapping safety.Thus,the speedup performance of ASIP is limited and the computation results are also not reliable.Considering these issues,the completed studies of this thesis are as follows:An efficient matching algorithm based on control data flow graph(CDFG)and the structure characteristic of custom instructions is proposed.The CDFG can ensure that the matching subgraphs conform to the execution logic of program.The searching space of matching process is also reduced by partitioning basic blocks of CDFG and classifying custom instructions according to the number of inputs and outputs of the nodes.Experimental results show that the matching time of this algorithm is much shorter than traditional matching approach.A custom instruction covering method based on maximal weight independent set(MWIS)model is proposed.This approach build a safety check mechanism to ensure that the matching subgraphs can really be executed by ASIP.So the risk of mapping confusion is reduced.Furthermore,it makes better use of the opportunities for speedup from overlapping subgraphs to improve computational capabilities of ASIP under area constraint.Experimental results demonstrate the necessity of safety check,and show that the MWIS model can obtain better speedup performance compared with the direct covering which the overlapping subgraphs are not allowed.The whole design flow of custom instruction mapping is completed in this thesis.Taking the C/C++ source program and custom instruction as inputs,an optimal subset of matching subgraphs which can be added to ASIP is identified under the safety assurance of code generation.