Research And Design Of USB3.0 Physical Layer Digital Circuit Based On FPGA

With the fast development of communication industry, the requirement of speed of data transmission is becoming higher and higher,so the original 480Mbps USB2.0 transmission speed has been unable to meet the demands of current data transmission and USB3.0 has been proposed which transmission speed can reach 5Gbps.USB 3.0 Promoter Group which composed by Intel, Microsoft, HP, TI, NEC, ST-NXP and other IT industry giants announced that a new generation of USB 3.0 standard has been officially completed and public released on 2008.USB 3.0 has a very big improvement about both the transmission speed and performance.This paper introduces the division of USB3.0 physical layer digital circuit module and the principle, function and detailed circuit design of the digital circuit design. And at last,I use the hardware language which named Verilog to write the corresponding code of some digital circuit modules and complete the timing function simulation.The paper studies the detailed standards and specifications of USB. 3.0 Which specified by the IEEE.The paper mianly studies and researches the relevant knowledge of the physical layer on chapter six of USB 3.0 specification and in the process of research, the digital module is designed.At first,the data transmission between physical layer and digital link layer has been analyzed. Then, it is about the digital circuits design of the 8B/10B encoder and decoder module, the K28.5 detection module,the receiving state detection module and the elastic buffer module.Finally,Verilog hardware language is used to write codes and functional simulation has been done with the development tools QuatursII.According to the USB3.0 standard, the digital circuit design of each module is realized based on FPGA.The simulation results show that the design can achieve the target.