Design And Implementation Of Multi-channel High-speed Serial Data Exchange Technology

With the rapid development of information networks and the increasing connectivity of information systems, digital information is showing explosive growth trend, the era of big data has come. At the same time, in the military field, the signal intensity is mixed, the signal form is more and more complex, the development of high speed and large capacity memory array is very necessary. Having a high rate, immunity and other advantages of differential serial transmission technology has replaced the traditional single-ended parallel interface technology to become high-speed interface mainstream technology. What is more, fiber-optical communication transmission media has been widely used, optical transceivers module take exactly full advantages of high-speed fiber optic transmission media, so as to solve the problem in the long-distance wired communication transmission.Based on the analysis of the overall program of high-speed and large capacity storage array, a design scheme of multi-channel high-speed serial data exchange technology is given in this thesis. The scheme is based on the main control platform of Virtex-6 HXT family FPGA produced by Xilinx corporation, which uses interconnect link between its embedded GTH transceivers interface and optical transceiver module QSFP to achieve sending and receiving serial data to four fiber channels, and uses its built-in GTX transceivers interface to achieve sending and receiving four channels sampling serial data after the processing of the collection / playback board. Data exchange module realizes parallel data caching, reducing speed and distribution, and the two kinds of data allocated to the storage array or collection / playback board in the storage and playback mode. The main work is as follows:1. The functional structure and operational principle of Virtex-6 GTH transceivers is studied based on the in-depth understanding of high-speed serial technology in this thesis.2. Both hardware and software of the GTH transceivers and GTX transceivers interfaces are designed, thus, the interface communication requirements of optical transceivers modules, collection / playback board and memory board are satisfied. And the user clock of GTH transceivers is in-depth studied as a key point, the logic of parallel data alignment control of the receiver is designed also.3. The architecture and working principle of the optical transceivers module QSFP are studied. The interconnection link between the transceivers and GTH transceivers and the switching module of four channels optical data and sampling data are mainly designed.4. The design of high-speed interface and data exchange system power and clock module is carried out, and the power distribution scheme is given. At the same time, the stable power and clock output with the software configuration is achieved.5. The communication of high-speed interface, the fiber link transmission module and the data exchange control module are tested, and the results verify the correctness of the data transceiver and two data streams exchanged.