Design And Implementation Of A High Speed Serial Data Transmission System

In order to accomplish the task of high-speed serial data storage, the serial transmission mode is used to transmit data in FPGA platform based on the deep study of high speed serial transmission technology. In this thesis, the data acquisition module is used to sample the analog data in the frontend, then the Virtex6 chip is selected as the controller to transmit the data. Finally, the data is transferred to the memory control chip.In this chip,the data can be stored in the SSD disk through SATA2.0 interface, at the same time it can be read back from the SSD disk and be stored in PC through special high speed interface. The research of this thesis mainly includes:1.On the basis of the structure and principle of ADS42JB69, this ADC is used to achieve reliable and high-speed data sampling tasks;2. The organizational structure, power supply network, reference clock, reset, coding mechanism and byte alignment function of Gigabit transceiver GTX are in-depth studied. On the basis of this, the IP core which is easy to operate is used to control GTX interface rather than directly through encoding to operate the GTX transceiver which has a complex structure internal. At the same time, the quality of the communication is tested by using the loop back mechanism of GTX;3.A effective codinig method and a new transmission control mechanism are proposed and applied to the high-speed serial transceiver TLK based on the study of TLK2711 A chip, and the task of data transmission among different chips is accomplished;4.The MIG core is choosed to control the read and write operation of DDR, and a large capacity cache module is designed by DDR3 SDRAM;5.The core of this thesis is the design of data management module, which is the pivot of data acquisition module and storage module. The main duty of the data management module includes the data channelized in the process of data collecting and storing, the control of the data transmission mechanism by the state machine. In the process of data playback, the module must complete the task of data path, buffer processing, TLK transmission control. The test results show that the module works properly, and the serial interface can effectively complete the transmission tasks.