FPGA Fast Implementation Of RSA Algorithm

The information technology revolution has led a large-scale dissemination of information, in the process of research that guaranteeing of information`s security acquisition, processing, conversion, transmission and preservation. the information security technology has gotten fast development. The cryptography technology that would be introduced in this paper is one of the core content of the information security technology. The RSA cryptosystem is the most widely used public key cryptography system currently, and it can be used in the field such as data encryption, digital signature and so on. On the other hand, because of the algorithm is so complex and the hardware implementation cost is really large scale, it can`t meet the consumption of cost and power for the limited resources environment of the embedded system. For this kind of situation, this paper designs a kind of small area RSA encryption hardware module which is applied in resource-constrained environments, and it is passed the FPGA verification.This topic comes from “The special chip solution of cartridges”, it`s a kind of low speed and small chip, an information protection function module was added to improve its security. So an embedded RSA encryption module is choose to design, the module can protect the chip data`s security and to prevent cracking by other manufactures and at the same time to meet the needs of the chip area. The implementation of RSA algorithm is deeply analyzed in this paper, and the base 2 Montgomery multiplication algorithm is used to eliminate the shortcoming of the traditional algorithm such as operation time is long, consumption area is large and so on. And the 2048-bit RSA encryption arithmetic was designed and implemented with the hardware module.This paper analyzes several kinds of algorithm of realization of RSA cryptosystem, and the L-R sequential scan mode multiplication algorithm and Montgomery algorithm are chosen which is suitable to design for this paper. The original Montgomery algorithm was improved in some ways, on the one hand, the base number r was chosen as 2 to convenient the process of hardware shift, on the other hand, a large number of subtraction operation is reduced by the process of increasing one circulation of all modular multiplication. Then the circuit structure is simplified and the internal SRAM is used to reduce the implementation area and optimize the critical path delay. Finally, the improved Montgomery algorithm is implemented in hardware module. On the software of ISE design suite, a related RTL design and functional verification and synthesize is done, and then the data stream file was downloaded to the chip by programming cable. The development board contains V5-110 T chip of Xilinx company, and it consume 5160 LUT, finally, the encryption function is proved exactly right by comparing the result of FPGA chip output and software output. If the chip can finally tape-out successfully, then the project design of RSA chip is similar than the products of same function, and the speed can also meet the requirements of practical.