Design And Implementation Of Low Power Based On A Micro Controller Unit

With the continuous advancement of the integrated circuit manufacturing process node, the integration degree of a chip continues to improve. When the integrated circuit process developed to deep sub-micron node, one hundred million gates can be integrated on a chip, leading to increase in power density and total power consumption. Increased power consumption of a chip will not only lead to lower reliability of the product, increasing packaging and cooling cost, but also reduce the battery service lifetime of the portable products. In the flow of integrated circuit design, power becomes one of the three primary concern factors, with area and performance. With the application of electronic products more and more widely, more and more functions can be realized, then the total energy consumption of electronic products will continue to rise. Therefore, the low power design of integrated circuit has the necessary research value and practical significance.This thesis introduces the research background, significance, and current status of low power technology. Through the analysis of power consumption sources of the CMOS integrated circuit, the basic way to reduce the power is obtained. Through the research of common low power design technology, design schemes of low power are selected for the specific application.In this thesis, use two kinds of technical solutions to reduce the dynamic power and static power of a specific MCU project. Clock-reset control module CRCTRL, based on clock gating technology, can effectively reduce the dynamic power of the clock-gated module. CRCTRL is not only applicable to the MCU system in this paper, but also can be transplanted to other system architectures with Cortex-M as the kernel in the case of not doing a larger modification. A power management scheme is designed for MCU system, using the multi-voltage and power-gating technique based UPF. This scheme can realize the power-up or power-down control of the specified power domain, which can reduces the total power dissipation of local modules or the whole MCU system significantly.In the two schemes, due to increasing the clock-reset control module CRCTRL (first scheme), power management module spi_pwctrl, PMU33, and related special module (second shceme), the MCU system’s area increased. In the first scheme, the MCU system used the CRCTRL module; and at the cost of the area increased by 4.7%, the dynamic power of the SPI module decreased by 5.4%. This scheme is applicable to the scenarios with relatively short standby time. For the MCU system using the power management scheme, at the cost of the area increased by 9.7%, the static power of the system can be reduced up to 25%, the total power dissipation can be reduced up to 99%. This scheme is suitable for the MCU system, with longer stangby time, because switching modes will consume an extra time.In the process of low power design, it is necessary to select a suitable low power technology, which considers the application scenarios, performance requirements, areas and power constraints of a chip.