Design Of Radar Signal Processing System Based On Multicore DSP

Excellent radar processing systems require highspeed data collection capability, powerful datatransmission capability and data processing capability. Therefore, There is a8000mips multicoreprocessor which is used for data processing in our system.There is a500msps high speed AD forradar data acquisition and conversion in our system, and the SRIO standard is been used for datatransfer between peripherals and processor.The system architecture is based on DSP+FPGA, and uses the TMS320C6678as the coreprocessor, uses the XC6VLX75T as the coprocessor on the board. The TMS320C6678integrates eightcore processors.The frequency for each core is up to1.25GHz. XC6VLX75T has GTX modules,which can be configured for many interface standards such as SRIO and PCIE. SRIO is the datacommunication transmission standard between C6678and XC6VLX75T in the system, and thetransmission speeds is up to1Gbit/s.The system uses a14-layer PCB architecture. This paper will have a detailed analysis aboutpower supply design, interface design. Based on the study of FFT parallel processing algorithm, Thispaper designs an multicore FFT program which is used Cooley-Tukey algorithm. At the end of thispaper, the system performance is been analyzed.