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Design And Implementations Of Video Format Conversion System Based On The FPGA

Posted on:2014-10-21Degree:MasterType:Thesis
Country:ChinaCandidate:H C BaiFull Text:PDF
GTID:2268330425956579Subject:Control theory and control engineering
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As the development of the image display technology, especially thehigh resolution display screen, the quality of the video image is more andmore important. In order to make the original traditional video image getthe best effect on the big screen, which requires the video formatconversion. This topic is about the video format conversion.This subject mainly studied the design and realization of a videoformat conversion system about the analog video of720×576×50iconversion to the digital video of1024×768×60p. First of all, using linerepetition to deal with the interlaced video. Compared with otheralgorithms, the proposed algorithm is more easy for hardwareimplementation. Then the interlaced scanning video of50Hz istransformed into the progressive scanning video of60Hz. Due to theirdifference, this system uses segmented frame interpolation, and everyfive frames interpolates a new frame. The SRAMs cooperate withFPGA to convert the field frequency50Hz to frame frequency of60Hz.Finally, this system uses the bilinear interpolation algorithm to convert aresolution of720x576into a resolution of1024x768.This system mainly uses EP2C8F256C6of Cyclone II series FPGAchip to realize the video format conversion, which is high performance,low cost, and it is made in Altera corporation. First, editing eachprocessing algorithm program in the Quartus II software9.0which isdeveloped by the Altera company. Then saving the program into externalEEPROM through the JTAG port. The system calls the program from theEEPROM when it starts to work. Compared with the previous videoformat conversions system, the scheme can deal with different videoformats via accordingly modify parameters, at the same time, also caneasily change the algorithm program.This system realized the SAA7111A register configuration, theping-pong operation control of memory, and deinterlacing, frame rate upconversion, resolution transformation, etc. Using CCD image sensorsignal as the video signal source of the system, a product business providing an LVDS-DVI video switching box and DELL LCD monitorto verify that the video format conversion function and working state ofthe system. The test results show that the system can reach the designtarget.
Keywords/Search Tags:Video Format Conversion, De-interlacing, Frame Rate UpConversion, Resolution Transformation
PDF Full Text Request
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