Research Of Optical Interconnect Switching Networks And FPGA Based Svstem Demonstration

As the chip integration is increasingly improving, more and more cores can be incorporated into a single chip. Multi-core architectures will be the main trend of the chip design. In the near future, one single chip could integrate hundreds or even thousands of cores. Traditional on-chip communication architectures would be unable to meet the current performance and bandwidth requirements, and network-on-chip (NoC) technology is becoming a hot issue in computer interconnection network. On-chip electrical interconnects has failed to provide power efficiency and high performance for inter-core communication. Electronic interconnect costs will finally exceed the cost of optical interconnects and optical interconnects are showing better business prospects. Optical Network-on-chip(ONoC) can achieve high bandwidth, low latency and low power consumption, witch has emerged as a high efficiency interconnection.Optical switching network work as the key module of the networks-on-chip architecture, which plays a vital role on the system performance. This paper proposed two novel ring-based4×4nonblocking silicon optical switching network for networks-on-chip, witch is the first time that just composed of five microring-resonator-based switching elements. Compared with the previous structure,our structure could achieve37.5%microring less, especially in the the formation of large-scale network. Waveguide cross reduced to six, whitch effectively reduced the insertion loss, so that the scalability of the network enhanced. In this paper, we use a simulator named PhoenixSim to evalutate the topology performance in terms of insertion loss and power consumption. We add new function to the microring-resonator-based switching elements, and the optical device models are improved in the simulation software. The simulation results demonstrate that the two proposed architecture consumes less power and less optical insertion loss. The power consumption of the five ring based switching element is reduced by approximately24.5%Especially. Based on the simulation of Optical Network-on-chip,we developed a FPGA based hardware system platform for demonstration. The main work is to build a multi-FPGA-based emulation framework to support networks-on-chip design and verification, including writing the test procedures, board high-speed optical communication (3.125Gbps) based on the Aurora protocol, assessment of system performance such as transmission rate, delay, error rate, transmission efficiency and other key parameters, preliminary established a optical interconnection network experiment platform.