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Design And Research Of High Voltage LDMOS Device Structure

Posted on:2014-12-09Degree:MasterType:Thesis
Country:ChinaCandidate:W W GeFull Text:PDF
GTID:2268330401964374Subject:Microelectronics and Solid State Electronics
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LDMOS device is widely used in high voltage integrated circuit. From thedirection of new materials, new structures and new technology achieving the optimalcompromise between breakdown voltage and on-resistance which are importantperformance index is a hotspot of current researching. In this article, three kinds of highvoltage LDMOS device structure are studied and analyzed.In high voltage LDMOS device with a drift region formed around a U-shapedtrench, the drift region is folded, to reduce the size of the device and on-resistance. Thetrench is filled with low permittivity materials, effectively to maintain a high voltage ofthe surface. This article has analyzed the impact factors of device performance such asthe shape, depth and width of the trench, and the doping of the drift region, and mainlyoptimized the parameters by simulation. This device structure exhibits a breakdownvoltage of771V, and an improved on-resistance of19.57·mm2.Triple RESURF high voltage LDMOS device structure is based on the RESURFtechnology, and introduces a p-type buried layer in the drift region, increasing the driftregion doping amount, effectively achieving low on-resistance. By detailed simulation,the impact factors of device performance such as the doping concentration, position,thickness and length of the P buried layer have been analyzed. The device structure hasa breakdown voltage of734V and on-resistance of14.61·mm2.High voltage LDMOS device structure is covered with a high permittivity filmoptimizeing the surface electric field, to achieve high breakdown voltage by achievingthe best transverse flexible electric flux. Through the analysis of the simulation, therelationship between device parameters such as the drift region structure, the highpermittivity film, the plate field and performance index has been investigated. Thebreakdown voltage of the device is816V, and the on-resistance is as low as16.78·mm2.In this paper, the three high voltage LDMOS device structure have all achieved700V class, and maintained a relatively low on-resistance.
Keywords/Search Tags:LDMOS device, breakdown voltage, on-resistance
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