USB2.0Device Controller Design And Verification

With evolving of the computer and peripheral equipment and increasing of the demands for the rate of data transmission, the traditional parallel and serial interface already can not meet the application requirements. Now USB2.0is commonly used as standards which connect a computer and external devices, with the transferring rate improved and real-time transmission enhanced, it obtains extensive application.The dissertation firstly introduces the main contents of USB2.0protocol, including:USB2.0architecture, packet, transactions, data transmission type, and error control.Then based on understanding the USB2.0protocol, the dissertation presents the structure design and module partitioning for the USB2.0device controller, which is divided into five modules: UTMI interface, protocol layer, memory interface and arbitration, control and status registers, and Wishbone bus interface. Verilog HDL is used to design each module and Modelsim tool is used to simulate the RTL design.Finally, the dissertation carries out functional simulation and FPGA propotying for the whole USB2.0device controller. In functional simulation, the whole RTL design of USB2.0device controller consisting of those modules is verified by Modelsim, and simulation results shows the design can achieves the requests of USB2.0protocol. In FPGA propotying, with the CY7C68000FPGA chip, a configured USB device correctly finishes the communication between host PC and USB, and the whole communication process is analyzed with an USB2.0Protocol Analyzer. The FPGA verification and analysis results show that the design achieves a USB2.0device controller’s functions basically to satisfy the desired design goals.