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Research On3D NoC Power Adaptive Routing Methodology

Posted on:2013-09-09Degree:MasterType:Thesis
Country:ChinaCandidate:Y H QinFull Text:PDF
GTID:2248330371488443Subject:Microelectronics and Solid State Electronics
Abstract/Summary:PDF Full Text Request
Network on Chip (NoC) technology have indisputable advantages in scalability, reusability, design efficiency, bandwidth and synchronization strategies. With the increase of the core number integrated in NoC, the traditional2D NoC can’t meet the performance requirements, especially encountered bottlenecks in the communication and chip area. With the development of the three-dimensional integrated circuit technology, three-dimensional network on chip (3D NoC) has gradually become the method to solve the problems above.As the power and its uniform distribution is one of the important considerations in3D NoC, this paper established a three-dimensional power model which can be used in3D NoC, and proposed a Three-dimensional Power-adaptive Routing Algorithm (TPRA).Then based on the TPRA we proposed a Three-dimensional Full-adaptive Routing Algorithm (TFRA) to further enhance the3D routing flexibility, improve the power distribution, better optimization of the power consumption distribution of3D NoC and effectively avoid the hot spots generate.To solve the power consumption problems in3D NoC design, we first established a three-dimensional power model which can be used in the3D NoC, and combine with the odd-even turn routing model, we proposed a power-oriented3D routing algorithm TPRA. This algorithm can make routing decisions based on the power status of the network, in order to optimize the power distribution of the network, it can effectively avoid the local power consumption. We built a simulation platform of the3D NoC by SystemC(system-level modeling language)to validate the algorithem, experiment results shows that the TPRA algorithm can significantly optimize the power consumption and power distribution, in the best case, the maximum power and power variance decreased up11.57%and24.61%respectively.Secondly, in the basis of the TPRA algorithm and power model, in order to further improve the flexibility of the three-dimensional routing and optimization the power distribution, a free deadlock Three-dimensional Full-adaptive Routing Algorithm (TFRA)was raised. This algorithm can better adaptive power routing, by use the same3D NoC simulation platform build by SystemC system-level language, experiment results shows that the TFRA have increased dramatically in power performance than the TPRA, in best case, the average power consumption decreased by9.61%, maximum power consumption decreased by19.45%and power consumption variance decreased by42.52%.This paper studied power optimization as a starting point of the3D NoC routing algorithm, dedicated to design low power and balanced power distribution routing algorithm of3D NoC, to provide a reference for the3D NoC into the practical application stage in future.
Keywords/Search Tags:3D Network on chip, 3D router model, power model, Power distribution, 3D routing algorithm
PDF Full Text Request
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