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Research On Evolvable Hardware Technology Based On SystemC

Posted on:2011-02-05Degree:MasterType:Thesis
Country:ChinaCandidate:X Y WangFull Text:PDF
GTID:2248330338996071Subject:Measuring and Testing Technology and Instruments
Abstract/Summary:PDF Full Text Request
Evolvable hardware can change its own structure according to changes of environment to adapt to their survival environment. An important way of putting evolvable hardware into project is that realize self-evolving system. Recent years, research on SoC design and implement methods become the hotspot of the microcomputer system because of high integrated performance. Therefore, realize evolving control and reconfigurable hardware on a chip, and bits stream configuration and data communication also be finished on chip. And furthermore constitute single chip evolutionary systems which have properties self-adaptive and self-repairing. It has significance and research value. SystemC as an excellent system design description language, can accomplish of all designs from system to Register Transfer Level (RTL)、from design to verify and software to hardware using only one language. This paper studies that realization of self-evolving system on a chip using SystemC. Main research aspects are as the following:(1) Analysed the status of evolvable hardware、the basic principles、key techniques and the way of classification. It has given the search tool--the basic operation flow of genetic algorithm, and given the design steps based on SystemC using SystemC language, introduced SystemC simulation and debugging environment, described the process of moduling using the SystemC.(2) Stuied the overall structure and implementations of self-evolving system on a chip, and analysis of the system between the various modules. Moduled the key module of self-evolving system using SystemC--reduced instruction set computer(RISC CPU) and genetic algorithm module. In the simulation software SystemC_Win environment, debug program and then build waveform file; given the instructions of RISC CPU and RISC CPU system and genetic algorithm module code.(3) Evolve respectively a second-order low-pass chebyshev filter parameters and classification rules based on the self-evolving system module, verify the effectiveness of the experimental platform. It has given the filter module, and then obtained filter transfer function derived from the module, describes the evolution of the system about filter parameters, get the optimized filter parameter by simulation, and then analyze the simulation results, at last analyze the genetic algorithm control parameters on the experimental. It has given the block diagram of evolution of classification rules, introduced the ID3 algorithm to generate the initial rule population, obtained genetic algorithm optimization set of rules. Simulation results showed that the complexity of the optimized rule set is decreased.
Keywords/Search Tags:Evolvable Hardware, SystemC, SoC, Genetic Algorithm, Filter, Classifier
PDF Full Text Request
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