.10 Gepon, The Olt Mac Sub-layer Design Verification, And System Simulation

With its main features: simple for network composing, low cost, maintain conveniently and easy to update and expand, EPON(Ethernet Passive Optical Network) has won highly attention of both Telecom operators and telecom equipment producers and it become the best solution of FTTH. As the video and date services are huger than before, surely its requirements towards bandwidth will be more serious in the future. The existing EPON rate is only 1.25Gbps, which is not enough for bandwidth; obviously it should be the last trend that 10G EPON will instead EPON to meet the high requirements of enormous compositive operations for bandwidth. In addition, smoothly upgrading from EPON can also reduce the operating cost.Based on the research on the protocol of MAC sub layer in IEEE802.3av and the key technologies of 10G EPON, the design and implement of OLT MAC sub layer and system verification of 10G EPON is completed in the dissertation. The implement of MAC sub layer here means that of MAC and RS sub layers under 10G EPON Agreement. As for the design, the general structure of OLT is given according to the agreement. And the architecture of the MAC is presented according to the functional requirements of MAC sub layer, which is divided into seven modules:CPU interface,Send frame module,Add FCS module,XGMII interface module,Delimitate frame module,FCS Check,Receive frame module. Then, the detailed design proposal of each module is completed.As for the verification, the verification requirements of 10G EPON system is given. And the detailed verification solutions based on VMM and ESL modeling is proposed.The verification environment and the design of partial verification component are presented in the diaaertation.At last, the system verification of 10G EPON and specific testing examples are implemented.Based on deeply understanding of protocol, the functions protocol specifies are implemented,the functions of circuits are described with the method of top to down by VerilogHDL.As the increasing of the scale and complexity of the circuit,verification is becoming the focus and difficulty electronic engineer pay attention to. According to the verification requirements of the project, the detailed description of system EDA verification of 10G EPON is finished in the dissertation. Based on the VMM verification architecture, the verification strategy is based on ESL modeling. The verification strategy both of system verification and unit verification is given in the dissertation.Based on VMM architecture,the system verification environment of 10G EPON is finished.System verification architecture diagram and the detailed design of BFM,CHECKER are presented.The automation of verification is implemented by CHECKER, including automatic matching of the packet of up stream and down stream.After the completion of verification environment, the detail of 10G EPON system verification is discussed in this dissertation, including simulation and debugging of multi-rate downstream and upstream data path and MPCP protocol path. To support the FPGA test, simulating the typical application scenarios of 10G EPON,the simulation and debugging of the discovery process of single ONU,multi-ONU,10G/10G symmetric mode and 10G/1G asymmetric mode are completed.