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B3g Test Platform Of Software And Hardware Development

Posted on:2007-06-04Degree:MasterType:Thesis
Country:ChinaCandidate:G L CaoFull Text:PDF
GTID:2208360185956641Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
UESTC is in charge of the downlink of the B3G project that bases on FPGA. The system needs a tool to debug the logic in FPGA. The B3G Test Platform can capture the data of computation in every module and transmit the data captured into Personal Computer. We can debug the module by analyzing these data. In addition, the B3G Test Platform supports the Bits Error Ratio (BER) test.The hardware of the B3G Test Platform is based on Xilinx XC2VP30 FPGA embedded PowerPCTM 405. The peripheral equipment, which includes serial control, B3G test tools, DDR control, interrupt control, connect the On-chip Peripheral Bus of PowerPCTM 405. In addition, the clock module and the misc logic module are necessarily to make the B3G Test Platform work. In order to debug the B3G Test Platform, the ChipScopeTM core is adopted.The serial control implements transmitting and receiving data under the RS232C protocol. The serial control is standard input and output equipment of PowerPCTM 405 embedded in FPGA.The B3G test tools implement high speed (above gigabit bps) data transmission using Aurora protocol of Xilinx. The B3G test tools save the high-speed data into DDR SDRAM and send the data to Personal Computer. The data captured by B3G test tools is used for debugging the module and analysing performance. In addition, the B3G test tools support Bits Error Ratio test based on Pseudo-random Number.The clock module provides the clock of the system. The clock module is based on Digital Colck Manager of Xilinx. The misc logic module can capture and lock the errors of Processor Local Bus and On-chip Peripheral Bus. These errors can be shown by Light-Emitting Diode light.The ChipScopeILA core is used for debugging the FPGA logic and timing. The ChipScopeOPBIBA core is used for debugging the interface logic of On-chip Peripheral Bus.The software of the B3G Test Platform consists of the software embedded in FPGA and the software developed in WindowsTM. The sofrware embedded in FPGA is used to config and control the peripheral equipment. The software developed in WindowsTM is based on Win32 Application Program Interface. It can communicate with PowerPCTM 405 and control the peripheral equipment of On-chip Peripheral Bus。The B3G Test Platform not only provides test method of B3G project, but also uses for high-speed data transmission. For example, the B3G Test Platform may get the data of simulation using FPGA.
Keywords/Search Tags:Aurora, BER, FPGA, PN, PowerPC, OPB, Asynchronism Serial Communication
PDF Full Text Request
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