Low Power Design And Power Test Of The Ofdm-based Wireless Communication System-on-chip

Nowadays, there is a rapid development of electronic technology, VLSI systems increasingly large scale, the power influence has been growing attention by people. In particular the wide range of popular portable devices, due to battery constraints, in order to have a longer duration of use, low power consumption must be considered. OFDM technology is now widely used in the communications field, because it can be very effective to combat frequency selective fading and narrowband interference, can effectively utilize the bandwidth, in the narrow-band bandwidth is also able to send large amounts of data, so well received by the operators loved and welcomed.This study is low-power IC design and implementation based on a kind of OFDM system, specifically for the CMMB radio receiver chip technology low-power research.This paper describes the advantages of OFDM radio broadcast system and features, while analysis of various aspects of the feasibility of reducing power consumption;Then discuss several important ways to reduce power consumption design and implementation, given the realization of the program and design process. Finish the low-power design from the power management, clock management, memory optimization, circuit optimization. The focus is on clock management and memory optimization, proposed and implemented OFDM system bit-interleaver of a new realization method.Followed by the power analysis, and the results made estimates. Carry out a detailed power analysis used of the power analysis tool, PrimeTime (R) PX, including the system working at full speed, low-power mode, membist mode, scan mode, the lowest power consumption and other states.Finally test of the power consumption of the chip, and get the data of the actual power.