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The Test And Validation Of The High-speed Parallel Optical Interconnect Chip

Posted on:2011-04-18Degree:MasterType:Thesis
Country:ChinaCandidate:L Z KeFull Text:PDF
GTID:2178360305481976Subject:Communication and Information System
Abstract/Summary:PDF Full Text Request
With the rate of modern board-level communications increasing, because of the inherent defects of the transmission framework based on electrical interconnection technology, has gradually failed to meet the demand and "Light of Copper retreat" also becomes popular. Many research institutions have invested a lot of manpower and resources to develop the related technologies and wish to develop their own optical interconnect devices and standards. The test and verification of the optical interconnect chip become more severe, and more and more enterprises, research institutes pay more attention to it.Currently testing and certification tools of the chip also varied based on different chips, specifically, is divided into two areas:digital chip testing and validation and mixed chip/analog chip testing and validation. The testing of digital chip is generally have three steps, including functional testing,structural testing through circuit topology and design for test, especially the design for test based on the EDA tool. A large part of the test and validation for digital-analog hybrid chips is to rely on expensive equipment to carry out or design for test through a large number of IC engineers associated to analog. It not only increases the cost but also the difficulties.According to the requirements of the project, the appropriate testing and validation for the optical interconnect chips are needed to be done in the paper. The functional test in this paper includes the theory based on the signal integrity analysis, finishing the design for a high-speed PCB and comparing the results of the simulation and test. In the functional validation, we use digital test to avoiding the conventional expensive equipment and generate high-speed data stream based on FPGA chip. According to engineering design requirements for resources and also taking into account the familiarity of the chip designers, the company XILINX XC5VFX30T is chosen as the design chip. And based on the requirements of the agreement of communication, the Aurora XILINX is selected as the communication protocol standards and has completed to the development stage based on FPGA and made the logic simulation.The test of the board shows that the high-speed PCB design meets the requirements of optical interconnection chip testing.
Keywords/Search Tags:signal integration, test, FP6A, AURORA, simulation and analysis
PDF Full Text Request
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