Simulation And Study On Breakdown Characteristics Of High Power SiC PiN Diodes

Comparing to Si semiconductor, SiC, the third generation semiconductor material, has higher band-gap, higher thermal conductivity and higher electron saturation velocity, so that the PiN diodes based on SiC material can be used in the fields of high-temperature, high-frequency and high-power devices. It has shown excellent characterstics, such as large forward current,high breakdown voltage,low leakage current and high switching speed.Suffering from the electric field crowding, SiC PiN diodes are hard to achieve an ideal reverse breakdown voltage. Planar plane edge termination techniques can release electric field crowding.This paper mainly focuses on how to improve the breakdown voltage of SiC PiN diodes. The main simulation results are as follows:The working mechanism of SiC PiN diode is studied and its I-V characteristics have been simulated with ISE-TCAD. The forward voltage drop VF at a current density of 50A/cm2 is about 2.84V at 300K. The switch characteristics have positive temperature coefficient. Adoping double p+ layer structure, and device forward current characteristics are obviously improved and VF at a current density of 50A/cm2 is about 2.67V at 300K.The breakdown mechanism of SiC PiN diode has been analyzed. The device breakdown voltage is about 1200V without edge terminations, such as field plate, Field Limiting Ring and junction termination extension, and it can be increased to 1700V or higher with edge terminations. And then the relationships between the parameters of edge terminations and device reverse breakdown voltage are summarized.The peak electric field caused by FP can be eased significantly with FLR-Assisted FP technique (FLR+FP). The breakdown voltage of PiN diode is about 1750V with FP-Assisted JTE technique (FP+JTE), and only 1660V without FP assisting. Also the FP+JTE technique can suppress the side effect of interface charge. A new edge technique (JTE-like) has been studied, which can improve the device breakdown voltage just like class JTE technique, but consume less chip area.