Study On The Fabrication And Key Techniques Of 4H-SiC PiN Power Diodes

Silicon Carbide(SiC) has received a substantial increasd research interest due to its wide bandgap, high critical breakdown field, high electron saturation drift velocity, high thermal conductivity and execllent radiation tolerance. SiC based devices are deemed as a candidate to replace Si-based devices in applications of high temperature, high frequency, high power and high radiation hardness.In the power electronics system, a well-built rectifier should have high breakdown voltage, low reverse leakage current and the capability of handling large current, making 4H-SiC PiN diode as an important solution for high power rectifiers. In recent years, 4H-SiC PiN power diodes have been studied worldwide, and some good initial results from the abroad research works have already been obtained. However, there were not well solved yet in terms of key fabrication techniques such as Mesa etching, ohmic contact to p-type SiC and practical and reliable design of edge termination. On the other hand, experimental research reported in domestic are relatively limited by epitaxial material quality and manufacturing techniques. This dissertation mainly discuss the key techniques, diode fabrication and characterization. The main works are as follows:1. The dc characteristics of 4H-SiC PiN power diodes and its material-related physical parameters and design points were theoretically analyzed. Suitable numerical models were built based on the performance of the device, and the reliable material parameters assigned to the simulation were also introduced from the newest literatures.2. Based on an ICP-Bosch system with an F-O-based etch plasma, micro-trench, commonly formed at the bottom corner of mesa structure, and other etch-related defects have been detailed studied. Firstly, passivation mechanism and the optimization of flow of C4F8 gas were discussed. Secondly, the values of etching time(te), passivation time(tp) and relative ratio between them were focused for determining the effect on micro-trench. A comparable etching process model combined with passivation effect was proposed to understand the formation, expansion and elimination mechanism for the micro-trench. Through shortening the etching and passivation time in one Bosch cycle, namely ―high frequency‖ switching between them, a mesa structure without micro-trench has been fabricated. Finally, the effect of ratio of ICP and Bias power on the 4H-SiC etching was investigated. The results suggest that the imbalance between the physical and chemical mechanism would considerably deteriorate the morphology of Mesa structure.3. Ohmic contacts to p+-type 4H-SiC epilayer with a specific rough surface(i.e., step-bunching) were studied in detail based on the investigation of different Ti/Al based contact schemes. The change in surface status of the as-grown epilayer during thermal annealing, together with which influence on the inherent phase transition for the contact system, reveals a step-bunching-related favorable mechanism, i.e., an enhanced solid-state reaction kinetics at the metal/SiC interface leads to the decomposition of metastable step-bunching and subsequently the considerable outdiffusion of C and Si atoms, which plays an important role in the formation of the amorphous Si–C state and other preferable Ti3SiC2 phase and graphite. Combining electrical properties with microstructure analyses, an liquid alloy-assisted interfacial reaction mechanism was further identified to be beneficial for the formation of the ordered Ti3SiC2 layer having an heteroepitaxial orientation relationship(0001)Ti3SiC2//(0001)SiC with the SiC substrate, dominating the ohmic behavior of the Ti/Al based contact. Finally, an excellent ohmic contact with both low specific contact resistance(c?) as 2.7 × 10-6 Ωcm2 and smooth annealed contact surface was obtained for the bilayered Ti(100 nm)/Al(100 nm) contact treated with 3 min rapid thermal annealing(RTA) at 1000 °C.4. 4H-SiC PiN power diodes in terms of material preparation, layout and process design, device fabrication and electrical properties have been studied. Based on the optimization of the epitaxial growth and addition of a buffer layer onto the substrate, a final continuous P+N structure with quite a low surface structural defect density was obtained. The doping concentration and thickness of the N-type drift layer(i layer) was 5×1015 cm-3 and 15.5 μm, respectively. Major manufacturing process steps for the Mesa-terminated 4H-SiC PiN diodes include oxidation, formation of ohmic contacts, PI passivation and so on. The device with an active area of 0.023 cm2 shows a large forward current of 30 A and a small specific on-resistance of 0.76 mΩcm2 at room temperature. With the maximum breakdown voltage of 1300 V, the device demonstrates a figure-of-merit of 2224 MW/cm2. For the devices with a Mesa area of 0.005 cm2, a maximum breakdown voltage of 1565 V can be reached. At elevated temperature, the degradation in carrier mobility becomes evident in the high-level injection, modifying the negative forward-bias temperature coefficient inherent in the PiN diode. The micro-trench effect can lead to premature breakdown in dc reverse mode but have no any influence on the leakage or forward performance. High-resistance ohmic contact to p-type 4H-SiC is proved to increase the on-state losses and deteriorate the capability of handling large current of the diode. The carrier lifetime of 1 μs for the packaged device was obtained using reverse recovery testing system. The comparison of experimental and simulated results considering a modified low-field-mobility model indicates that there is an anisotropic mobility of the carrier transport when diode operates at ON-state.5. A new junction termination extension(JTE) structure named single-implantedmultiple-steps JTE(SIMS-JTE) with laterally tapered dose profile is proposed based on a multiple zone effect. The influence of SIMS-JTE dose and charge gradient between adjacent steps on the blocking characteristics was investigated for the 10-kV-class 4H-SiC PiN power diodes. The change in electric field distribution reveals that the electric field can be shared by the multiple zones of the SIMS-JTE, which plays a major role one by one according to an inside-out sequence. As a result, the location of maximum electric field strength slowly shifts with increasing the JTE dose, providing a high breakdown capability with an improved optimum dose window. Furthermore, the multi-zone efficiency is strongly affected by the charge gradient between adjacent steps, suggesting that a uniform change in step-charge would be suitable for obtaining the best possible blocking characteristics in the context of a medium designed step1 charge(Q1) and number of step(n). On the other hand, an accurate and available ladder-shaped mask realized by multiple-layered Al deposition is proposed. The influence of the thickness of Al mask on the implanted impurity distribution within SiC was comparatively studied by combining Monte Carlo simulation with implanted experiments. Finally, 10-kV-class 4H-SiC Pi N power diodes with different JTE structure were fabricated based on a lightly doped n-type epitaxial layer(thickness = 100 μm, doping = 3×1014 cm-3). Using a high JTE dose(1.72×1013 cm-2), a maximum breakdown voltage of 11.1 kV at room temperature can be reached for the device with SIMS-JTE(4-steps), which is much larger than that of device with single JTE and SIMS-JTE(2-steps), respectively.