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A Study On Cache Coherent Of CC-NUMA Multiprocessor System

Posted on:2009-10-01Degree:MasterType:Thesis
Country:ChinaCandidate:Y ZhangFull Text:PDF
GTID:2178360272475125Subject:Computer software and theory
Abstract/Summary:PDF Full Text Request
Cache Coherent-Non Uniform Memory (CC-NUMA) system is one of the popular multiprocessor systems. Cache coherent problem is important to both traditional MIMD system and CC-NUMA system, because it impacts not only system performance but also the scalability. It's introduced and analyzed that the existent protocol used to solve this problem and their ill effects to system performance and scalability. In view of the shortcomings, we design a Directory-Data Cache of Tow Level Directory architecture which is applied to CC-NUMA system.To detail, we add Directory Cache (Level One Directory) upon Directory Memorizer (Level Two Directory). The fullmap directory is applied to the former, and the limited directory is applied to the latter. It's named as Tow Level Directory architecture. Meanwhile Data Cache is added upon shared Data Memorizer by word extending of Directory Cache. We name this architecture as Directory-Data Cache of Tow Level Directory architecture. Furthermore, Weight LRU is brought about to conquer the Directory Overflow problem.In the way of system performance and scalability, we analyze and compare Two Level Directory with fullmap directory and limited directory about the space complex. It's proved the performance of Tow Level Directory is close to limited directory, while only suffered a litter cost about the space complex when comparing to fullmap directory. And the disadvantage of directory overflow is avoided. Lastly, we set up a test the hit rate of Weight LRU and compare it with classic LRU. We draw the conclusion that WLRU guarantees the high shared data is in cache and limited the rate of directory overflow, meanwhile only case a slight cache hit loss.Building study on Two Level Directory architecture, we logical design and simulate this cache structure by VHSIC Hardware Description Language (VHDL). First, we partition the Directory-Data Cache architecture into several modules in the view of function and assign their function. Second, after carefully analyze the relationship of modules, we describe the key technique within design and implement in detail. Third, we design and experiment on the modules. The last, by using experiment on Directory-Data cache of its performance, we drew the conclusion of the function and system performance.The result of simulation and test prove that Directory-Data Cache architecture implied to CC-NUMA system is effective in solving the problem between system performance, system scalability and directory memory overhead. It also guarantees the cache coherence. The result of logic synthesis shows that the hardware complex and the hardware cost of Directory-Data Cache architecture is very low. So this design fulfills the requirement of CC-NUMA system.
Keywords/Search Tags:cache, coherence, scalability, memory hierarchy, multiprocessor systems
PDF Full Text Request
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