The Design And Implementation Of SoC/IP Verification Platform By FPGA

In order to meet the need of embedded system market for cost, area and power dissipation, SoC has become an absolute solution. Verification task is becoming the foremost step in the SoC design flow due to the greater scale of SoC chip. It is short period and easy to modify the design for FPGA verification, so it can save a lot of time and increase the reliability of verification. Because of the drastical improvement of FPGA's density and performance, to build a FPGA-based rapid prototype of the SoC before taping out is becoming the important method to reduce the verification time. The study purpose of this thesis is designing a high-configurable SoC/IP verification platform by Xilinx's FPGA.Firstly the thesis introduces the design flow of SoC and emphasizes the difficulties coming up during the period of SoC verification. And at the same time, demonstrate the predominance of the SoC verification by FPGA which is the solution of the difficulties. Secondly, the thesis introduces the features and the logic architecture of Xilinx Virtex-II FPGA, including the descriptions of the function and architecture for the sub-logic-modules in the device. And then the configuration of Virtex-II FPGA is analyzed. At last choose suitable FPGA for SoC/IP verification platform: XC2V6000.After completing choice of FPGA device, the peripheral equipments are chosen to provide the detailed design scheme of SoC/IP verification platform based on the XC2V6000 FPGA, giving the function design, hardware design and modularization design, and expatiating the function of the peripheral circuit. On the basis of design theory of multi-layer PCB, the thesis detailedly introduces the PCB realization process of SoC verification platform by the following four steps: founding the component decal; definning the board outline, importing the circuit netlist; assigning the design rules, component placement and routing; design rule checking and copper pouring. Eventually, make an analysis of PCB's signal integrity.The function verification of SoC/IP Core, which contains not more than one million basic cells, can be implemented well by this SoC/IP verification platform. At the same time, the final PCB area of SoC/IP verification platform is 21cm×10cm, so it can be conveniently plugged into computer mainboard as a PCI device.