Research On Code Compression Technique For Embedded System

With the impelling of the requirement from consumer electronic market, embedded system has become more and more powerful. Nowadays, the code size of embedded software is doubled approximately every two yeas. By the limitation of the cost, silicon area and power consuming, code size is becoming the bottleneck of embedded system. Therefore, code compression will be one of the key technologies for embedded system in the future.First, we compare code compression to typical data compression, describe their characteristic respectively and point out their differences in the dissertation. Then we summarize several criterions for code compression. After studied ARMv4 instruction set, we present a scheme using dictionary compression to reduce the redundancy of the object code. We abstract the problem of dictionary compression mathematically and discuss some issues of parameters' selection using mathematical method. The steps of our compression scheme, the difficulties of code compression and the flows of some important algorithms are all presented in this dissertation. Finally, we test our code compression scheme on the 6 benchmarks in MiBench and gain 81.8% compression ratio.Based on our code compression scheme, we discuss the hardware design of decompression system and present a couple of design issues of optimizing the main parts in the decompression hardware. To validate our code compression scheme, a testbench has been established, including a decompression module using Verilog HDL, an instruction ROM containing compressed codes and an ARM ISA simulator using PLI. The verification has been finished automatically with correct result compared with ARMulator, which is the standard ARM core simulator.In the end, we make research on the result of compression experiment and analyze the factors impact on compression ratio. Then we talk about future works of our code compression scheme.