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Study Of Some Key Problems Of High Performance Computer

Posted on:2010-09-23Degree:DoctorType:Dissertation
Country:ChinaCandidate:H LiFull Text:PDF
GTID:1118360302471483Subject:Computer system architecture
Abstract/Summary:PDF Full Text Request
The Cache Coherence Protocol is a key component towards the correctness and effciency of the computer system. It is more difficult to design and verify the cache coherence protocol for Chip Multiprocessor(CMP), as the protocol should deal with the interaction between CMPs, inter- and intra-CMPs, etc. High performance computers are important resources to our country. We have studied the cache coherence techniques for CMP. Taking into account the scalarbility and performance, our work focuses on the MOESI protocol and its implementation. We have studied the cache coherence protocol in multi-CMP (M-CMP) systems. Experiments show that our work can improve system performance up to 1. 5X, and reduce the times of on-chip cache misses (13% up to 30%). To utilize on-chip cache efficiently is key to CMP' s performance. We have studied the performance of inclusive and non-inclusive on-chip cache and proposed an on-chip cache architecture that is based on exclusive policy.Some companies and research institution have dicided to comstruct high performance computers that based on LoongSon multi-core CPU. To comprehend the feature of LoongSon CPU under scientific applications more precisely, we profiled its performance. Based on the research, we proposed some idea to optimise its architecture. Experiments showed that our work can reduce the L2 Cache miss rate up to 50%.The network of high performance computer is key to HPC' s performance. We have studied a new network—MPU, including its mathematic model, topology, routing algorithm, etc. We proved that MPU has better performance that some other modern networks theoretically. After that, we have studied a large scale parallel simulator for MPU—MPUS, including its architecture, working procedures, etc. Experiments thowed that the design of MPU is right, and is good at scalability.KD-50-I is the first totally made-in-China Tera-Flops high performance computer that based on LoongSon CPU. We have studied its architecture and optimization to it. Our wrok contributes to the development and use of totally made-in-China high performance computer.
Keywords/Search Tags:Cache Coherence, Chip Multiprocessor, Parallel Computing, High Performance Computer
PDF Full Text Request
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