| Under the trend of globalization of integrated circuit production processes,while bringing economic benefits to chip manufacturing,it has also introduced security threats,such as hardware Trojans.Currently,hardware Trojans have attracted much attention and become a research hotspot.Among them,side channel analysis is always the most mainstream method for detecting hardware trojans.However,traditional detection based on side channel analysis often relies on a Trojan free golden chip,which is difficult to meet in actual detection scenarios.In addition,the detection effect is affected by environmental factors and process variation.In this thesis we focus on the detection of hardware Trojans based on side channel delay.The main work and contributions are as follows:(1)For the interference of environmental factors and process variation,in this thesis we theoretically analyzes the composition of circuit path delays and the sources of delay variation.By using delay order relationships instead of individual path delays for detection,we can effectively eliminate environmental factors and reduce the impact of process variation.(2)For the dependence of golden chips,in this thesis we derive the consistency condition between the simulation delay sequence pair and the actual measurement by setting a threshold value.On this basis,simulation delay sequences can be used instead of golden chips as a reference for hardware Trojan detection.(3)For the measurement overhead of path delay in detection,based on the theoretical analysis of circuit path timing constraints,we derives the relationship between the path stability delay and the fault output under synchronous clock conditions.The transition of fault output can indirectly reflect the delay relationship between circuit paths to a certain extent,providing the opportunity to use the fault sequence as a delay fingerprint for detection,eliminating the need for additional hardware overhead to measure actual path delays.Based on the above theoretical research,we proposes a hardware Trojan detection method based on path delay sequence and a hardware Trojan detection method based on path delay fault sequence.In this thesis,two types of hardware Trojan models are designed as detecting targets.Hardware Trojans are classified according to their impact on path delay,which are inserted into the circuit in a serial and fan-out manner,respectively.In the experiment,four ISCAS-89 reference circuits of different scales and an AES-128 instance circuit were selected as carriers,and the hardware Trojan was inserted into different positions of the circuit randomly,to verify the effectiveness of the proposed detection method. |
