Design And Research Of Large-Swing And High-Speed Drive Chip For Optical Engine

Optical communication has a wide range of applications due to its excellent characteristics as it provides high-speed,low-loss,anti-interference communication.As a core component of the optical communication engine,the driver chip provides proper modulated electrical signal for the electro-optical modulator,realizing electro-optical signal conversion.Its performance affects the quality of the entire optical signal transmission.In view of the development requirements of 5G communication and backbone network for optical engine with"electrical calculation and optical transmission",this thesis will focus on the driver chip and carry out research on establishment of the electro-optical simulation platform,design of a large-swing and high-speed driver chip,and testing and verification of a driver chip of the same type.The chip designed in this work can effectively drive Mach-Zehnder Modulator(MZM),a commercial device that is widely available today,and subsequently,this will provide crucial support for high-speed driver chip for 100G/400G optical engine technology.The main innovative highlights of this thesis are as follows:1.Based on the characteristics of CUMEC silicon-based optoelectronic technology,an electro-optical simulation platform for optical engine is established.A variety of optical modules including MZM are modeled by Verilog-A language,so that the intrinsic parameters of each device model are tunable.Main functions of the platform are simulated and the accuracy of the simulation results is verified.Based on the electro-optical simulation platform,integrated simulation of the transistor-level circuit and the established device model can be carried out,which enhances the ability of integrated design of electric chips and optical chips and,furthermore,complements the verification of the driver chip designed in this thesis.2.Based on the IHP 130 nm SiGe BiCMOS technology,a driver chip with large swing and high bandwidth is designed.The driver chip includes core circuit modules such as continuous time linear equalizer circuit,variable gain amplifier circuit and output-stage driver circuit,and the overall layout area is 0.33 mm~2.The post-simulation results show that the driver chip has a bandwidth of 41.43 GHz and a large-swing output voltage of 5 Vpp,which can effectively drive MZM.With an overall power consumption 0.96 W,it is capable of performing equalization up to 14.85 d B,and allows linear gain adjustment in the range of 12.06 d B to 25.97 d B,which meet the design requirements.The chip realizes effective transmission of 56 Gb/s NRZ signal and 112 Gb/s PAM4 signal.On the electro-optical simulation platform when transmitting 106 Gb/s PAM4,measured eye diagram of the optical signal is well qualified,which meets data centers’demands for high-speed single-channel 100 Gb/s optical engine.3.Based on the IHP 130 nm SiGe BiCMOS technology,a similar high-speed driver chip for MZM is designed in team coordination.After tape-out,the chip is tested and the standardized test process can be applied to testing of the same type of driver chips.The performance of the chip is tested with various rates and modulation signals,and the eye diagrams of the chip transmitting 25 Gb/s NRZ and 30 Gb/s PAM4 signals are sufficiently good.Thus,the fabricated chip serves well as high-speed driver for optical communication.