Research On Key Technologies Of Ultra-high Sampling Rate And Ultra-large Bandwidth Signal Processing

With the rapid development of wireless communication technology and the wide application of orthogonal frequency division multiplexing(OFDM),it is particularly important to solve the problems of IQ(In-phase and Quadrature-phase)imbalance and carrier frequency offset(CFO)in the communication system.But solving these problems on analog devices is ineffective and expensive.Therefore,it is necessary to compensate problems such as IQ imbalance and CFO on the digital side.This thesis analyzed the principle of IQ imbalance and CFO,studied the common estimation and compensation algorithms of IQ imbalance and CFO,and studied the joint estimation and compensation algorithms of IQ imbalance and CFO.Completed the design of the transmitter and receiver of the OFDM system and implemented it on the field programmable gate array(FPGA).Firstly,starting from the principle of IQ imbalance and CFO,this thesis analyzed the causes of IQ imbalance and CFO and the impact on the received signal.It was concluded that the effect of IQ imbalance on the received signal was that it will produce a conjugate interference of an ideal signal in the receiver,and the effect of CFO on the signal was that it will cause the received sigal to produce a linear phase rotation that changed with time.Secondly,this thesis theoretically analyzed the common estimation and compensation algorithms of IQ imbalance and CFO,and completed the performance simulation,and studied the two algorithms of joint estimation and compensation of IQ imbalance and CFO,and completed the design of the transmitter and receiver of OFDM system based on one of the algorithms.The transmitter used the Zadoff Chu(ZC)frequency domain sequence as the synchronization sequence,and designed a special training sequence to estimate the IQ imbalance and CFO at the receiver.The receiver completed the estimation of CFO by calculating the relative phase rotation of the two parts before and after the first training sequence and the relative phase rotation of the two training sequences,and the second training sequence was rotated in the forward and reverse phases of the same size as the estimation of CFO to completed the estimation of IQ imbalance.Then,based on the Xilinx Virtex-7 VC 707 evaluation board,the logical design,simulation and testing of the baseband transmitter and receiver of the OFDM system were completed.The ZC sequence and training sequence generation module,subcarrier mapping and inverse fast fourier transform(IFFT)module,upsampling rate filtering and framing module had been completed in the transmitter.In the receiver,the timing synchronization module,downsampling rate filtering module,CFO estimation module,IQ imbalance estimation and compensation module had been completed.In this thesis,by designing the receiver,the estimation of CFO and IQ imbalance was completed before the effective data was processed,and the compensation of one data was completed within two clock cycles.When the FPGA processing speed was 125 Mega Hertz(MHZ),the high sampling rate requirement of 10 Gigabit Samples Per Second(Gsps)was met by 80 parallel channels,and real-time compensation of effective data was realized,and 240 channels can be parallelized by using FPGA with more resourse to meet the high sampling rate requirements of 30 Gsps.Through OFDM technology,the large bandwidth was divided into 2048 small bandwidths,and the IQ imbalance was compensated by frequency independent on each bandwidth.Finally,the test results on FPGA were compared with the simulation results of the MATLAB platform to ensure that the hardware design met the requirements.