Design And Implementation Of A Super Junction MOSFET With Improved EMI Performance

As the core component of switching circuits,Super Junction MOSFETs have been widely used in high power and high frequency applications due to their lower onresistance and faster switching speed.However,with the upgrading and development of application scenarios,the switching speed and frequency of Super Junction MOSFETs is continuously increasing,leading to greater current change rate(di/dt)and voltage change rate(dv/dt)at the two ends of the device during frequent switching,resulting in severe Electromagnetic Interference(EMI)issues.Although introducing peripheral circuits can improve the EMI problem of the devices,it significantly increases the chip usage cost and circuit area.This thesis investigates and improves the EMI problem of Super Junction MOSFETs from the device perspective,with the aim of developing a Super Junction MOSFET with improved EMI performance.Firstly,this thesis starts with the basic theory of Super Junction MOSFETs and classifies the mechanisms of EMI noise generation in Super Junction MOSFETs,followed by theoretical analysis.The theoretical analysis suggests that the harder the reverse recovery current waveform,the faster the switching speed,and the larger the parasitic inductance,the more severe the EMI noise.Six EMI improvement methods were summarized and concluded based on this,including thinning the N-buffer layer,reducing carrier lifetime by electron irradiation,reducing the doping dose of polysilicon gate,increasing the doping concentration of the JFET region,thinning the thickness of the top epitaxial layer,and adopting a surface mount package.Then,an EMI simulation platform for Super Junction MOSFETs is built using the Sentaurus simulation software,and the six proposed methods are verified by simulation.The improvement degree of each method is evaluated based on the amplitude,frequency,and waveform oscillation of the simulated waveforms.Four methods are selected and verified through chip testing.Based on the EMI testing results of the actual application circuit,three methods-electron irradiation,reducing the doping concentration of the polysilicon gate,and increasing the doping concentration of the JFET region-are selected as effective in improving the EMI noise of Super Junction MOSFETs.Finally,based on the flow process parameters and relevant experience discussed earlier,key process steps affecting the EMI noise level of Super Junction MOSFETs were optimized,and the devices were packaged according to the optimized process parameters.The EMI performance of the new devices was significantly improved,with peak noise levels in the horizontal and vertical directions decreasing by 10.6% and 16.3%,respectively,compared to the original devices.These levels were well below the relevant standards,meeting the design requirements,and thus,a Super Junction MOSFET with improved EMI performance was successfully fabricated.