Research On Hardware Implementation Of SM2 Public Key Encryption Algorithm In Binary Domain Extension

In recent years,as information security has risen to the height of national security,relevant state organs and regulatory bodies have put forward the requirements of promoting the application and implementation of state secret algorithm and strengthening the controllable industry security from the perspective of national security and long-term strategy.It is particularly urgent and necessary to get rid of the excessive dependence on foreign technologies and products,build an industrial network security environment,and enhance the security and controllable ability of our industrial information system.As the key part of our national secret system,SM2 state secret algorithm is born late,has low computational efficiency and develops slowly,especially the research on hardware implementation.Therefore,this thesis studies the fast implementation of SM2 public key encryption algorithm under binary domain expansion based on FPGA platform.In this thesis,the underlying operation module used in SM2 cryptographic algorithm is systematically analyzed,and the design optimization is carried out for elliptic curve scalar multiplication,modular multiplication,modular reduction,modular square and modular inverse operation.Scalar multiplication is implemented by binary expansion method and elliptic curve points are mapped in affine coordinate system,which not only reduces the computational complexity but also increases the reuse rate of hardware resources.For modular multiplication algorithm,this thesis optimizes the traditional Karatsuba algorithm,reduces the number of modular reduction required by traditional algorithm from 3 to 1,and improves the efficiency of modular multiplication algorithm.A modular reduction algorithm based on objective fixed polynomial is proposed for modular reduction operation.This method is suitable for any trinomial and five-term expression,and can be used for reference for all fixed polynomial reduction.For modular square arithmetic,a kind of arithmetic machine is designed which uses little resources and can complete any polynomial square arithmetic in one week.For modular inverse operation,this thesis adjusts and optimizes the integer domain extension Euclidean algorithm so that it can quickly complete the binary domain extension operation.Based on the above research,the hardware design of SM2 public key encryption algorithm is completed by Verilog HDL,and the functional simulation is completed by Vivado.The verification platform based on UVM was built to complete the functional verification of system level and module level.Finally,the test was completed on the FPGA trusted board.The test results show that the SM2 public key encryption circuit designed in this thesis can realize the correct encryption and decryption operations of SM2,and can complete 300 encryption and decryption operations per second at the frequency of 200 MHZ.