| The domestic Sunway compiler has been widely used in the Sunway series processor platform after long-term research by many researchers.Control flow statements widely exist in scientific computing programs,and the existence of control flow statements seriously hinders the exploration of parallelism in the compilation process.Therefore,based on the Sunway compiler,this thesis studies the control flow conversion technique in the middle-end optimization phase and the back-end instruction generation phase,and improves the parallel exploration ability of the Sunway compiler.The main work and contributions of this thesis are as follows:(1)A control flow transformation algorithm based on loop multi-version technique is proposed.During loop Auto-vectorization(SIMD)compilation,control dependencies introduced by control flow statements hinder the vector parallelism of applications.However,the traditional control flow conversion technique can only convert the control flow of a single-level loop,and the control flow conversion in a multi-level nested loop is a very difficult problem.This thesis integrates the multiversion technique into the control flow of the nested loop.By cloning the control flow,two versions of the loop are generated.One version performs control flow conversion,and the other version does not perform control flow conversion.The control flow version is vectorized to implement the outer loop control flow transformation.This thesis provides an idea for the control flow vectorization of multi-level nested loops,and also provides a new method for the compiler to explore the vector parallel optimization of multi-level nested loops.(2)An accurate control flow transition cost evaluation model is proposed.During backend instruction generation(RTL phase),the transition of conditional branch instructions is guided using precise control transition cost evaluation.The control flow conversion in the RTL phase is aimed at the conditional branch statement outside the loop,and is processed by converting the conditional branch statement in the program into a non-branch statement or a conditional execution statement.Based on the instruction set characteristics of the Sunway processor,this thesis aims at the inaccurate calculation of the control flow conversion cost in the RTL phase of the Sunway compiler.By adding the execution frequency of the basic block in the control flow,the weighted calculation of the execution cost of the basic block of the branch statement is carried out.Expected value to improve the accuracy of cost calculation during transformation.(3)An optimization method for pointer aliasing and memory access alignment techniques is proposed.In the vectorization phase of the Sunway compiler,based on the loop multi-version technique,the optimization research on the pointer aliasing and memory access alignment problems in the vectorization phase is carried out.Traditional compilation optimization relies on micro-architecture and program characteristics.The object code generated by modeling and analysis methods is inflexible and has a bias in adaptive ability to different contexts.The introduction of loop multi-version technique can alleviate this problem.This technique Combined with the analysis method of the context feature quantity,it explores more optimization opportunities in the program and improves the optimization ability of the domestic compiler.The work of this thesis is integrated in the prototype system of Sunway compiler,and the correctness and performance improvement test of SPEC CPU2006 Benchmarks and NPB-3.3.1 Benchmarksd are carried out on the new generation of Sunway 1621 server,and the control flow conversion optimization of GIMPLE phase SPEC CPU2006 test.The overall performance of the SPEC CPU2006 test set is improved by5%,the individual subject is improved by up to 30%,and the overall performance of the NPB test set is improved by 3%;the control flow conversion optimization in the RTL phase improves the overall performance of the SPEC CPU2006 test set by 2%,and the overall performance of the NPB test set by 2%.The results show that the work of this thesis can improve the conversion efficiency of control flow in the Sunway compiler,which is of great significance to give full play to the architectural advantages of the domestic Sunway processor. |
