Research And Application Of Hardware Acceleration In Heart Sound Classification Algorithm Of Congenital Heart Disease

Yunnan has a high incidence of congenital heart disease.Large-scale screening of congenital heart disease through cardiac auscultation is the basic method for early detection of patients.But this work is difficult because of time-consuming and power-consuming.To solve the problem that cloud services cannot be used to accelerate the algorithm in the poor network environment of Yunnan mountainous area,this paper proposes an offline solution for the real-time processing of congenital heart disease heart sound classification algorithm.Therefore,it is very meaningful to provide a stable work for the machine-assisted diagnosis of congenital heart disease.The main work is as follows:1.Design of heart sound signal classification algorithm.The original heart sounds in congenital heart disease were denoised.By analyzing the time-frequency features and feature extraction methods of heart sound signals,the MFSC feature extraction method is selected.The time-frequency feature map of heart sound was organized into two dimensional three channels,which is used as the input of convolutional neural network.2.Hardware optimization strategies and design of key modules of the accelerator.Through the analysis of the feasibility of CNN to be accelerated,convolution operation is determined as the main optimization target of hardware acceleration.The general convolution and general pooling modules are designed and implemented.From the perspective of data and loop dependency,dynamic floating point quantization,pipeline,loop tiling,unrolling and array partition are carried out.In addition,the HLS/HDL joint optimization was carried out for the key modules in the accelerator at structural perspectives.By increasing the reuse of data,the parallelism and data utilization of convolution computation and the parallel processing speed is increased.3.System hardware and software to work together.From the perspective of software and hardware co-design,the tasks can be divided into PL and PS parts.After comparing single-engine and stream mode,the single-engine system architecture was chosen.The data transmission between ARM and FPGA is carried out through the AXI＿DMA.Under the control of ARM,AXI＿Lite bus read and write control parameters on FPGA.The AXI＿Stream bus is used for fast data transmission between the IPs inside the FPGA.Thus a circle of data flow was formed between ARM and FPGA.This design takes advantage of APSo C system.Single-engine architecture was adopted.The CNN model was deployed and accelerated by calling the general acceleration module repeatedly.4.Deployment and analysis of the system.After deploying overlays to hardware for testing and analysis,DSP resource occupation is 41.36% and BRAM resource occupation is only 11.43%.It met the requirements of hardware resources.The classification accuracy was stable at more than 90%.Compared with the average accuracy of 91.52% of general CPU,the acceleration effect of FPGA system was improved by about 30 times,while the classification accuracy only lose about 1%.In summary,this method can meet the requirements of high performance,low power consumption and low cost,realize the hardware acceleration of heart sound classification algorithm of congenital heart disease,and provide an offline solution for the auxiliary diagnosis of primary congenital heart disease.