Study On The Process Of Deep Silicon Groove Ething Applied MEMS

Due to the rapid development of MEMS technology,the microstructure on MEMS components has also developed from the previous simple surface structure to a more complex three-dimensional structure processing method,and the processing method of high aspect ratio structure is also one of the most important aspects of the development.The RIE-ICP etching system occupies a dominant position in the deep silicon etching market due to its ability to independently control the plasma density and positive ion bombardment capability,high etching speed,simple structure,low cost,and strong process stability.In this paper,through the experimental research on the masking layer picture process,the screening of the masking layer material and the use of the RIE-ICP etching system,the optimization of the deep silicon etching process parameters is realized,and the deep silicon ventilation holes are processed..The key research contents of this article also include:1.The technical parameters related to the patterning of the masking layer are determined and checked by means of experiments.The patterned reticle is smoothly and correctly transferred to the surface masking layer in preparation for the subsequent silicon etching.2.Through the in-depth study of the etching mechanism,the morphological characteristics of the technical parameters of the deep silicon etching process and the relationship between them and the main technical characteristics are systematically discussed,which provides an important basis for the design and analysis of the technical parameters in the future.3.After a large number of experiments,the correlation between the photo-etching speed of the masking layer and the deep silicon etching process parameters was confirmed,and the photoresist was established as the main material of the masking layer.4.Comprehensively considering the etching depth of TSV,photoetching speed,sidewall inclination,photoetching selectivity ratio,pantai pleats and other factors,after determining and gradually improving the silicon etching process parameters,finally completed Through-silicon vias with a depth of187.41 μm,a photoetching speed of3104?/min,a sidewall inclination angle of 90.7°,a photoresist etching selectivity ratio of 208:1.5.Based on a large number of experiments,typical process developments have been made based on the conclusions obtained,such as high perpendicularity silicon grooves,low roughness sidewalls,and bottom chamfering.