Design Of Vehicle Target Detection System Based On FPGA

In recent years,with the combination of deep learning and computer vision,and relying on the improvement of hardware computing speed,the field of target detection has developed rapidly in algorithms and applications.In industrial applications,target detection has great application prospects in scenarios such as forest fire detection,marine search and rescue,and vehicle violation detection.In edge deployment,compared with popular computing platforms CPU and GPU,FPGA has flexible interfaces,which can communicate with a variety of interface peripherals.FPGA also has high concurrency and pipeline capabilities,and achieves better energy consumption balance,so it is suitable for embedded edge-side algorithm deployment.Based on the ARM+FPGA heterogeneous computing platform ZYNQ,this paper designs a vehicle target detection system with improved YOLO V3 Tiny as the network structure.This paper designs a DVP to AXIS conversion module based on Verilog,which converts the DVP image collected by OV5640 into AXIS image data,and implements the HDMI image protocol through IP such as VDMA,VTC,and AXIS2 Video.The single-stage target detection algorithm YOLO V3 Tiny is used as the deployment algorithm,and the network structure is optimized as follows: In order to reduce the on-chip storage occupancy of the FPGA,the bit width’s conversion of weight and data are completed through 16-bit fixed-pointization;The batch normalization layer is merged into the weight parameter to reduce the network operation load;the convolution kernel is converted into a uniform size structure to simplify the operation complexity of the convolution layer.In the optimization of FPGA network deployment,the data interconnection structure is designed to realize the pipelineization between units;the weight and feature data storage are sorted and optimized according to the parallel data path transmission mode;the local convolution unit,accumulation unit,upsample unit and pooling unit are designed to adapt to the operation of different network layers;in order to improve the system throughput,the internal cache of the operation unit is divided into blocks,the loop operation is pipelined,and the read and write operations are parallelized and optimized.Finally,based on Vivado HLS,SDK and other development kits,the system data path,image collection and output module,and each operation unit are functionally verified.The test results show that the functions of each module are correct and the system can work normally.The system energy consumption and resource occupancy tests are completed,which is compared and analyzed with ARM,GPU and related work.This paper achieves a throughput of 11.59 GOPs on the ZYNQ7020 platform with a clock frequency of 100 MHz.The system energy consumption ratio is 4.64GOPs/W.The performance is better than that of the ARM side,and the power consumption is also much lower than that of the GPU side,which is suitable for edge deployment and applications.