The Design Of High Frequency Synchronous Rectifier With Adaption And Anti Misopening

With the characteristics of soft switching,LLC resonant converters are widely used in mobile phone fast charging,vehicle charging,solar power generation and other fields.The use of synchronous rectification technology can greatly improve power efficiency.MOSFET(Metal-Oxide-Semiconductor Field-Effect Transistor)has parasitic inductance.Under high frequency conditions,the parasitic inductance of MOSFET will make the synchronous rectification turn off in advance,which will seriously affect the efficiency of the converter.The synchronous rectification will have the problem of false start in the load state.Therefore,it is of great significance to study a synchronous rectifier circuit that is not affected by parasitic inductance and has the function of preventing false turn-on under light load.This thesis firstly introduces the working principles of the half-bridge LLC resonant converter and synchronous rectification.Focusing on the efficiency reduction caused by parasitic inductance of synchronous rectification under high frequency conditions and the problem of false turn-on under light load conditions,the following circuit designs are mainly completed:(1)The self-adapt to the dead zone circuit module is designed,which reduces the influence of parasitic inductance by dynamically adjusting the turn-off dead zone cycle by cycle.The module has the characteristics of rapid adjustment,wide adjustment range and simple circuit implementation.(2)A slope detection circuit module is designed,which can detect the load state of synchronous rectification and increase the function of light-load shielding and false opening.The module has the characteristics of convenient adjustment,simple structure and easy integration;(3)The minimum on/off time circuit with adjustable parameters and the fast on-off drive circuit are designed to improve the operating frequency of the system and expand the application scope of the chip;(4)The chip integrates a bandgap reference circuit,an undervoltage latch circuit,and a drive circuit module.Finally,the function of each module is simulated and verified by Cadence and 0.18μm BCD process,the layout design is completed and tape-out is performed,and the physical test of the tape-out synchronous rectifier chip is carried out.The test results show that the highest operating frequency of the chip is 403 k Hz,and the highest input voltage is 25 V.The turn-on and turn-off delays for driving a 10 n F capacitor are 50 ns and 29.4ns,respectively.The minimum turn-on time and turn-off time are adjustable from 300ns-1000 ns and 600ns-2000 ns respectively,and the influence of high temperature of 125 ℃ on the minimum turn-on/off time is less than 5%.The dead zone is dynamically adjusted to 160 ns,and the light-load anti-misoperation function is enabled,and all the working indicators of the chip meet the requirements.And the minimum on/off time adjustable and dead zone dynamic adjustment function are added.