| With the rapid development of technologies such as the Internet of Things and 5G,electronic devices play an important role in human society,and power management chips,as an important part of electronic devices,assume important responsibilities such as power conversion.Nowadays,electronic devices continue to develop in the direction of miniaturization and low power consumption,and at the same time,with the battery technology gradually entering the bottleneck period,which puts forward higher requirements for the performance of power management chips,so it is very necessary for the research of low-power power management chips.In this paper,a low-power buck DC-DC converter based on constant on time(COT)control is designed.The converter adopts synchronous rectification technology and implement dead time control,which reduces the working current of the circuit by improving the internal circuit structure and working mode of the system,and sets the working state of the MOS tube in the circuit to the sub-threshold area,thereby reducing the power consumption of the system.Since the traditional comparator adopts the differential input method,most of the input and output stage current is directly realized through the current mirror image,and the current required for the input and output stage of the comparator is larger when considering the delay problem.this paper proposes a low-power loop comparator based on the traditional comparator structure by improving the provision mode of tail current source in the comparator circuit to reduce the current of the input and output stages,so as to reduce the overall power consumption of the system.When the system is at a light load,the system needs to monitor the inductor current in real time to prevent current backflow,because the traditional sense current circuit is always in the working state,so it consumes a great deal of quiescent current under light load,resulting in a significant increase in system power consumption,so this paper proposes a low quiescent current zero current detection circuit,the circuit can dynamically adjust the working mode of the system with a very low quiescent current,and realize the early control of the offcontinuous current tube under the conditions of light load,thereby reducing the static power consumption of the system under light load or no load,effectively improve the efficiency of system conversion.In addition,the system is equipped with a soft-start circuit,which ensure the soft-start circuit only works normally when the system starts through adding a logic control circuit inside the circuit,the soft-start circuit is in the stopped state for the rest of the time,that further reducing the dynamic power consumption of the system.The schematic diagram and layout of Buck DC-DC converter are designed by using Cadence virtuaoso tool and verified by simulation.The designed converter can work normally in the input voltage range of 1.5V ~ 2V,the system can output a voltage of about 600 m V,and the efficiency remains high in the full load range.Especially under microampere-level load,the system efficiency can still reach more than 80%,and the maximum efficiency of the system is89.14%,The static current of the whole converter system is about 833.9n A. |