Research On Scheduling Algorithm And Implementation Of Some Function Modules For Clos Switching Fabric

With the development of space technology,the switching equipment inside a spacecraft is increasingly becoming the core of the system,and the switching network in the space station which undertakes the heavy responsibility of communication is facing greater challenges.Switched Ethernet networking technology obtains a wide range of applications in the LAN area because of its flexibility and maturity.In 2008,International Space Station’s Columbus space capsule has begun to use an Ethernet switch,which means that Ethernet has opened the door of space applicationsBased on the laboratory research project "Research on information system network switching technology in Space Station",the principles of building a spacecraft switch system as well as the design and implementation of a Gigabit Ethernet which can be used in a space station are studied in this dissertation.An orthogonal centralized link scheduling algorithm for MSM(Memory-Space-Memory)type 24*24 three-stage Clos(4,8,6)network switching fabric is proposed,and the specific design of switch units that employs this algorithm as well as its implementation in FPGA are also discussed.The dissertation firstly briefly describes the switched Ethernet technology,analyses and compares different structures of Switching network.Then based on the project undertaken by the laboratory,a frame-based orthogonal centralized link routing algorithm is proposed,and the way to improve the scalability of this algorithm by using cell-based multi-sub-scheduler technology is discussed.Thirdly the dissertation makes a summary of the design for the overall structure of the high-performance switching network in space station and switching units at all stages,at the same time detailed describes and specificly implements the middle-stage Crossbar structure and the scheduling module and bus module in the output stage.At the end of the paper the achieved switching modules are timing simulated by the FPGA simulation tool Modelsim,and the switching network is tested on a board-level.According to the result of the simulations and tests,the correctness,rationality and feasibility of this design are verified.And the desired research target is finally achieved.