Research On Molecular Dynamics Simulation Acceleration System Based On FPGA

Molecular dynamics simulation is one of the basic methods of molecular system modeling.Its basic idea is to assign the initial state of the molecular system,use the computer to solve Newtonian mechanical equations,and simulate the trajectory of particles.Molecular dynamics simulation can simulate the microscopic evolution process of a system at the atomic level,and has become an important reference and supplementary means for experimental research.It has wide applications in various fields such as pharmacy,biology,chemistry,materials science,and physics.At present,many mature molecular dynamics software packages have been developed for different fields.However,the calculation algorithms of interparticle forces are very complex,and the simulation of practical biomacromolecule systems is too time-consuming and expensive.The calculation of range-limited force consumes the most resources,accounting for 90% FLOPs,and takes the longest time.Therefore,microsecond or even millisecond simulation for biomacromolecules is very important for optimization and acceleration of range-limited force calculation.In recent years,with the rapid development of integrated circuit technology and production process,Field Programmable Gate Array(Field Programmable Gate Array,FPGA)stands out among other development platforms for its advantages of flexible design,high energy efficiency and low power consumption,and has become the most promising accelerator for molecular dynamics simulation.However,the traditional HDL design of FPGA has some problems,such as programming difficulty and long development cycle,which become the biggest factor limiting the research of molecular dynamics simulation acceleration on FPGA.To solve the above problems,this paper proposes a design method of acceleration system for range-limited force simulation based on FPGA.HLS and HDL are co-developed to combine the high efficiency of HLS with the accuracy of HDL,which not only improves the design efficiency but also guarantees the performance of the acceleration system.Finally,the hardware acceleration design of range-limited force calculation is realized on FPGA.The main work and innovation of this paper are as follows:Firstly,a range-limited force computing system based on FPGA is designed using HLS.According to its functions,the system is divided into five modules for implementation,including the data reading module for acquiring particle data in memory,the module for screening particle pairs that meet the conditions for range-limited force calculation,and the module for generating particle pairs that reduce the calculation amount.The range-limited force calculation module is responsible for calculating range-limited forces between particle pairs;the force accumulation module is responsible for local accumulation of forces in a group of box pairs;the force accumulation module is responsible for relieving the pressure on the read and write ports of the force memory;and the force update module is responsible for writing the calculated forces back to the force memory.In order to ensure the calculation efficiency of range-limited force,pipelining technology is adopted to streamline the whole system.Secondly,aiming at the problems of large register resource consumption and low system operation frequency in the range-limited force computing system,a new particle scheduling mode is designed to change the mapping scheme of particle pairs to particle pairing.In this scheduling mode,the force accumulation module can be divided into two parts,and the force accumulation of static particles is based on the register,and the design is realized by HLS.The force of dynamic particles is accumulated based on BRAM,and HDL is used to realize the design.In order to increase the number of force calculation pipelines in the system,a data prefetch module is designed to read the particle information in the memory under the condition of multi-pipeline,so as to ensure the efficiency of force calculation.Thirdly,in order to further improve the computational efficiency of range-limited forces,a parallel computing system of range-limited forces based on FPGA is designed.Aiming at the multi-pipeline access to the storage space,the access control module and the force update module are designed to solve the access conflict problem caused by the multi-pipeline access to the memory at the same time and the limited memory read and write ports.Compared with the quad-core central processing unit,the resulting range-limited force parallel computing system achieves 87.33 times of acceleration and 30.45 times of acceleration compared with the pre-optimized range-limited force computing system.