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Research And Implementation Of Low Resource Occupancy Correlation Filtering Algorithm Based On FPGA

Posted on:2022-11-01Degree:MasterType:Thesis
Country:ChinaCandidate:J P LuoFull Text:PDF
GTID:2518306764979969Subject:Computer Software and Application of Computer
Abstract/Summary:PDF Full Text Request
With the advent of the era of big data,the society in which people live has created an explosive growth of data in the past few years,which has provided a large number of application scenarios for visual processing tasks,and the combination of hardware platforms and computer technology has also shown a powerful strength.Among them,target tracking technology is one of the important and complex technologies.The main research of target tracking is to estimate the subsequent position of the target according to the historical image sequence information of the video.In the tracking process,the key to the accurate and effective tracking of the tracking algorithm is the real-time extraction of image features.Compared with other tracking algorithms,the correlation filtering tracking algorithm is one of the algorithms with better comprehensive performance.Aiming at the defects of boundary effect and low stability of correlation filtering algorithm,this paper improves the feature extraction model in the algorithm to improve the effectiveness of feature extraction.The correlation filtering algorithm is implemented on the FPGA,and the hardware design has the advantage of rapidity compared with the software.The research focuses on the optimization of the algorithm and the design of the hardware circuit,aiming to reduce the hardware resource occupancy of the correlation filtering algorithm using FPGA.The main research work of this paper includes:Thesis,the correlation filtering algorithms and strategies are studied and compared.In view of the boundary effects and algorithm instability problems caused by the accelerated operation of correlation filtering,the algorithm is improved and the research on the low resource occupation of the correlation filtering algorithm is completed.Then,it is determined that the Fourier transform module of the relevant filtering acceleration operation is a part with high requirements for computing resources,so module optimization is necessary for performance and low resource occupation requirements.Finally,the detection performance of the correlation filtering algorithm is evaluated through the standard detection data set of the correlation filtering tracking algorithm,and the hardware verification of the improved solution is carried out.The resource utilization of the optimization algorithm proposed in this paper is compared with the existing work.The correlation filter tracking system proposed in this paper performs fast target tracking while achieving low resource overhead.Under the low-resource-cost correlation filtering and tracking system that has been implemented based on FPGA hardware platform,The residue system is used to redesign the 2d Fourier transform module in the correlation filtering algorithm to achieve better resource optimization effect.Implement a method that balances resource usage and performance.Combined with the actual designed FFT processing task of 4K points,after a comprehensive analysis and comparison of the more popular FFT algorithms,the radix-4FFT is integrated into the remainder system to realize the hardware design of the algorithm.Compared with the FFT processor system based on the remainder system implemented in [57],the resource occupancy of LUTs is reduced by 20.9%,and the resource occupancy of BRAM is reduced by 26.7%.This paper studies the related filtering algorithm of FPGA with low resource occupancy.The test results show that the correlation filter tracking system proposed in this paper has the performance of low resource occupancy and achieves the research goal.
Keywords/Search Tags:Correlation filtering, FPGA, Residue number systems, Target tracking
PDF Full Text Request
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