Design And Implementation Of Digital Assisted Analog Domain Self-interference Suppression Circuit

As the dense deployment of wireless communications equipment and communications bandwidth enhancement,aggravated the congestion in the radio spectrum.Co-time co-frequency transceiver technology uses the same frequency band to transmit and receive signals at the same time,which reduces interference between transceivers and improves spectrum utilization in the scenario of dense transceivers.This technology has the problem of multiple and strong power self-jamming deteriorates the received SNR,such as an aircraft communication system equipped with transmitter,jammer and reconnaissance equipment.Analog domain suppression can suppress the self-interference signal in the received signal to the level of ADC dynamic range,which is an effective method to eliminate selfinterference.This thesis designs and verifies a digital-assisted analog domain self-interference suppression circuit for three self-interference scenarios.Firstly,architecture analysis and program design.Three analog self-interference suppression architectures,direct RF coupling,baseband digital assistance and feedback digital assistance,are analyzed,and their advantages and disadvantages are compared.The scenario with three self-jamming signals and two access modes of antenna and wired is analyzed.A digital-assisted analog domain self-interference suppression architecture with self-interference acquisition is used to design an overall hardware scheme with a working frequency of 30 MHz?3000 MHz and six functional modules,and its various design indicators are analyzed detailedly.Secondly,circuit implementation and performance verification.Two key circuit modules in the digital-assisted analog domain self-interference suppression hardware is implemented.For the self-interfering reference signal acquisition circuit,a 3-channel secondary frequency conversion superheterodyne circuit is designed and implemented.For self-interference reconstruction and digital processing circuits,the ADC/DAC circuit related to analog signal processing and MPSo C and its peripheral circuit related to digital signal processing are designed and implemented.When there are three self-interference signals simultaneously and the total bandwidth is 2.2 MHz,it is verified that the selfinterference suppression in the analog domain of the proposed scheme can reach 44 d B.A digitally assisted analog domain self-interference suppression overall hardware scheme is designed,key module circuits is implemented,and the overall performance is verified in this thesis.It provides engineering examples and references for the design of analog domain self-interference suppression circuit in multiple self-interference scenarios.