Design Of Precision Noise Synthesis Control Module

As a test signal source,noise source is widely used in various electronic circuit and communication system testing.In this thesis,the noise generator can output gaussian white noise,band limited white noise and narrow band noise.Gaussian white noise and band limited white noise are used for random event testing and channel gain flatness testing.Narrowband white noise is used in modulation systems such as communication systems and high-speed clock jitter modulation.According to the different noise sources,the noise synthesis methods can be divided into digital,analog and mixed.This Thesis adopts the method of digital synthesis to realize random noise.Digital noise source provides flexible programmability for noise signal and is suitable for various automatic tests.This thesis mainly focuses on the following aspects:(1)Analyze and study the generation method of digital random noise data,and analyze the feasibility of synthesis method and the quality of synthesis noise data by combining the realization ability of digital hardware circuit.Combined with software and hardware,the complex mathematical operation is realized in the upper computer in advance,and the algorithm that needs high-speed processing is realized in the hardware.On the basis of the output of the common noise signal--Gaussian white noise,this thesis also deeply studies the synthesis of arbitrary noise distribution data and the synthesis noise with high peak factor,which improves the high quality of noise data and expands the application scenarios of noise sources.(2)Hardware implementation of digital broadband and RF noise generation algorithm,common digital noise generator is limited by the signal processing speed of digital devices,resulting in a very low output noise bandwidth,only suitable for common audio testing fields.In this paper,high-speed DAC is used to achieve noise signals with a maximum bandwidth of 600 MHz,which can be applied to RF testing.But high-speed data processing requires dedicated logic design.Noise generator are involved in multilevel digital signal processing system,characterized by FIR filter,in order to match the high-speed parallel digital signal processing to filter structure design,and solved the problem of the speed of parallel design and bring about a lot of resources consumption,this thesis is based on DA algorithm for balance of FPGA resource utilization,reduce the resource request to the device.(3)implementation of FM noise signal,the synthesis of FM noise with bandwidth and center frequency variable,mixer FM can realize noise spectrum shift directly,but not accurate suppressed carrier frequency and mirror frequency,adopt the way of IQ modulation for the noise amplitude and phase modulation,the corresponding digital logic design achieve ideal radio frequency interference noise.The system test results show that the noise synthesis module can output broadband White Gaussian noise and has a good peak factor,which can be used to test the system with low bit error rate.Through filtering and modulation,it can output bandlimited/narrowband noise signals with controllable bandwidth and center frequency.