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Silicon Wafer Etching Depth Prediction Model Based On Interpolation And Difference Optimization Algorithm

Posted on:2022-12-15Degree:MasterType:Thesis
Country:ChinaCandidate:T HuangFull Text:PDF
GTID:2518306746968769Subject:Computer Science and Technology
Abstract/Summary:PDF Full Text Request
In recent years,the experimental data obtained during the design and processing of semiconductor devices are very limited and valuable because of the complex,costly and time-consuming processing.In addition,there are numerous process parameters that affect semiconductor processing results,making it difficult to construct accurate physical models.Using a small amount of data to evaluate the performance of semiconductors is a challenging task.With the development of machine learning algorithms,it has been widely used in the prediction of semiconductor device processing processes.One difficulty in using machine learning for semiconductor processing process prediction is that more training data is required to improve the model accuracy.However,more data means higher cost in the trialand-error phase,which will further increase the cost of expensive semiconductor manufacturing cycles.For the semiconductor wafer etching process prediction problem,this paper proposes a machine learning algorithm prediction method.Namely,the Interpolation and difference optimized(IDO)prediction algorithm,which is based on the data simulated by the Technology Computer Aided Design(TCAD)simulation to achieve the prediction of semiconductor wafer etching depth.The main work of this paper is as follows.1.Introduces the research background and research significance ofsemiconductors at home and abroad,and summarizes the small-samplealgorithms according to the types of their development.The algorithms basedon small samples are introduced class by class,and the advantages anddisadvantages of each class are analyzed.An IDO prediction algorithm isproposed as a method for predicting semiconductor processing processesapplicable to small-sample data.The method adds TCAD simulation data tothe basic machine learning algorithm and applies three small-samplestrategies.In the machine learning model ML1 module,the strategy ofexpanding the sample space is used to provide more a priori knowledge forthe machine learning model.In the machine learning model ML2 module,thestrategy of reducing the volatility of the target space is used to reduce thetraining burden of the machine learning model.In the machine learning modelML3 module,the strategy of restricting the sample space to a much smallersample space is used by exploiting the task commonality.It is experimentallydemonstrated that the predicted semiconductor silicon wafer etching depth bythis algorithm can better fit the results of actual experiments with lower MSE.2.Firstly,training and prediction experiments using IDO prediction model withthree base algorithm models(ANN,BPNN,LR)at different sample numbersare used to demonstrate the prediction effectiveness of IDO prediction model.Secondly,the ablation experiments using IDO prediction model with differentsample numbers are used to demonstrate that each module of IDO predictionmodel plays an indispensable role.3.27 different combinations of IDO prediction models are listed using Cartesianproducts,and experiments are conducted with different numbers of trainingsamples to analyze and compare the optimal combinations of IDO predictionmodels under sequential and random data sets.The performance prediction of12 ?m and 30 ?m thick a-Si:H n-i-p semiconductor devices using the optimalcombination of IDO prediction models is demonstrated to be applicable notonly to the etch depth prediction of semiconductor wafers,but also to theperformance prediction of semiconductor devices and other fields.
Keywords/Search Tags:Machine learning, Small sample, TCAD, Semiconductor Processes
PDF Full Text Request
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