Research On Deployment And Optimization Of Network Functions Based On P4 Switch

Network functions(NFs)are essential in today's networks,they have different roles in the processing of network packets.These network functions commonly need to be processed in a given order,thereby forming SFC(Service Function Chain).In the meantime,the emerging of programmable data plane providers a new opportunity to improve the performance of the deployment of NFs and SFCs.P4(Programming Protocol-Independent Packet Processors)is a presentative work in the programmable data plane,and its flexible programmability allows network operators to develop and reconfigure the user-defined packet processor in the P4 switch with low development costs.However,in order to maintain high forwarding speed,the P4 hardware switch exists memory and computing limitations,which hinders the deployment of some network functions and service function chains.Hence,this thesis deeply studies the deployment of network functions and service function chains in light of this issue,and main contributions are as follow:1)To explore the limitations of NFs implemented on P4 switches,we conduct four test-bed experiments consisting of a P4 hardware switch.Results show that composing NFs can reduce the requirement of computing resources in the pipeline and increase the possibility of deployment of multiple NFs.2)We propose p Heavy,a heavy flow detector with machine learning algorithm implementing in the programmable data plane,which can predict heavy flows without the intervention of the controller.In order to tackle the effect of the memory limitation,p Heavy proposes a decision tree training algorithm and flow management mechanism to reduce memory usage.Experiments show that p Heavy has high accuracy in prediction while decreases the size of machine learning models 5.4x on average.3)We propose p SFC,which is a fine-grain optimization scheme of deployment of service function chains.p SFC first analyzes P4 programs by CFG(Control Flow Graph),and then makes the composition of SFCs based CFG.Thirdly,it decomposes the composing CFG to each sub-CFG implementing in P4 switches.Experiments show that p SFC takes up about 20% performance in the composition of redundant logic comparing with other schemes,thereby decreasing the latency of processing packets and deployment costs of the P4 switch.