Research On Multiphysics Field Coupling Characteristics Of 3D Microsystem

With the decrease of device size and the improvement of chip integration,‘More Than Moore' has become the development trend of the integrated circuit industry.Under this trend,3D integration technology and TSV technology emerged at the historic moment,becoming the key technical approach to realize 3D microsystems.However,as the integration and power density of 3D microsystems increase,many challenges have been brought to the electrical characteristics,thermal characteristics,and stress reliability.Therefore,it is imperative to simultaneously investigate the multi-field coupling analysis of electrical design,thermal management,and stress.And as the size of the microsystems shrinks,the complexity of the finite element numerical simulation of the package-level 3D microsystems will further increase.In order to solve the above problems,this paper is oriented to a 3D integrated microprocessor system,through an improved dual cell method(DCM)to achieve rapid electrothermal analysis of the microsystems,and to achieve efficient calculation of thermal stress through the principle of stress superposition.This method can effectively realize the hot spot prediction and stress estimation of the microsystems,and provide theoretical guidance for the layout design of the microsystems chip.In this paper,the coupling factors of leakage power and material coefficient with temperature are introduced and analyzed in detail.The dual cell method is improved based on electro-thermal coupling,and an iterative dual cell method is proposed.The algorithm decomposes the original constitutive matrix so that the temperature-dependent matrix iterative matrix has a smaller amount of calculation compared with the FEM.The structure of the 3D integrated microprocessor system is proposed.The equivalent thermal conductivity method is used to establish the equivalent thermal conductivity model of the TSV structure and verify the accuracy.When considering the electrothermal coupling,the hot spot temperature of the microsystems increases by 20.8K compared with the case without coupling.After that,the algorithm proposed in this paper is used to study the layout of the 3D integrated microprocessor system.The conventional layout of the TSV array and the Core layout's influence on the hot spot temperature of the upper and lower chips are compared,and the influence of uneven core's power distribution on the two layouts is also studied.Finally,a stress superposition calculation method for the TSV array is proposed for the 3D microsystems,and the verification proves that the method has good accuracy for the equivalent stress of the TSV.Based on the temperature obtained by the iterative dual cell method,the influence of electrothermal coupling on the stress level is studied.The number of TSVs in each stress interval is counted,and the reliability of conventional layout and Core layout is studied.We studied the influence of package bump and micro bump size on the stress of TSV.Based on the research results,a distributed layout of package bumps is proposed,and the number of TSVs in each stress interval is counted and compared with the conventional layout.