Research On Low-complexity Channel Equalization Algorithms In Coherent Optical Communication Systems

At present,the transmission capacity of coherent optical backbone network has reached 100 Gbps or even 400 Gbps or 1 Tbps.Due to the limitation of electronic bottleneck,most of the mainstream coherent receiving digital signal processing（DSP）chips are designed based on the clock rate of the 500 MHz core.The traditional signal processing technology based on serial mode cannot meet the requirements of high speed and high throughput in optical transmission system.In the coherent optical communication system,the coherent receiver chip improves the system throughput through parallel processing architecture,but at the same time,it brings the problems of high power consumption and high complexity of the communication system.Combined with the research status of low complexity coherent receiver chip algorithm and parallel processing scheme design at home and abroad,finding low complexity 2×2 MIMO algorithm and design scheme for parallel processing is an important research content in the field of coherent optical receiver DSP algorithm.In the field programmable gate array（FPGA）based coherent receiving DSP algorithm,it is found that the 2×2 multi-input multi-output（MIMO）based on parallel processing in DSP algorithm occupies the main FPGA chip design area and power consumption.Aiming at the problem of high complexity in coherent optical communication system,this paper mainly studies and designs:1)Research and implementation of low complexity tap coefficient updating algorithm scheme in 2×2MIMO parallel processing scheme based on CMA.In this paper,an implementation scheme of the CMA algorithm in parallel processing is proposed.On this basis,the low complexity algorithm is optimized,and the tap coefficient is updated by using the partial equilibrium output value to reduce the complexity of the CMA algorithm.2)The realization of the research scheme of the equalization algorithm of the frequency domain 2×2MIMO structure based on the down-sampling processing.Firstly,a low-complexity 16-point basis 4 Fast Fourier Transform（FFT）algorithm is designed and implemented.Then,the proposed time-domain low-complexity CMA algorithm is converted to low-complexity frequency domain by FFT algorithm.Finally,the down-sampling frequency equalization communication is completedThe main innovation and research contents of this paper are as follows:1)We proposed the implementation of low complexity tap coefficient update algorithm in the 2×2MIMO parallel processing scheme.First,we proposed the implementation of constant modulus algorithm（CMA）in parallel processing,and then we proposed the implementation of CMA with low complexity in parallel processing.Our CMA algorithm used 1,2,4 parallel processing outputs to update the tap coefficients.Compared with the traditional CMA algorithm,the optical signal-to-noise ratio of our CMA algorithm is 18.8db,17.9db,15.7db and 16d B respectively when the bit error rate is 10^-3,which reduced the computational complexity by 38.49%,38.19%and 37.58%respectively.2)Low complexity polarization demultiplexing and linear channel equalization algorithm and parallel processing scheme.We proposed an equalization algorithm based on a 2×2 MIMO structure in frequency domain.Firstly,we designed the low complexity implementation scheme of the Fast Fourier Transform（FFT）algorithm with different cardinality.Then we transformed the implementation scheme of CMA algorithm with low complexity in parallel processing by FFT algorithm in time domain to update tap coefficient in frequency domain to reduce the implementation complexity of CMA algorithm.Finally,the whole de-sampling equalization system is implemented based on 1.75 times de-sampling under the condition of 0.16d B optical signal-to-noise ratio cost,which reduces the complexity of the equalization process.