Research On XX Constellation Load Processing Software System Based On Multi-core DSP

With the continuous development of microsatellite technology,its advantages such as low cost,light weight,and flexible launch make it widely used in military,commercial and scientific research fields.Advances in the development of payload equipment have resulted in a gradual increase in the amount of on-board data.For example,more and more high-resolution imaging devices have been used in satellites,which has led to a rapid increase in the amount of on-board image data.The massive amount of data puts forward higher requirements on the data processing and communication capabilities of the on-board electronic system,and traditional data transparent transmission schemes can no longer handle it.Therefore,in the case of limited resources on micro-satellites,it is necessary to develop a high-performance onboard load data processing software system.At the same time,since the on-board software has strict reliability requirements,this article adopts the bare metal bottom layer to build the system instead of commercial operations.system.Based on the project development requirements of a certain type of microsatellite constellation load processing system,the core CPU of the system adopts the TMS320C66 x eight-core DSP,and a multi-core parallel computing software system without operating system support is studied.First of all,the software system functions are divided,and the design plan for the eight-core DSP software system is given.For the multi-core parallel computing architecture in the plan,this article compares the currently widely used master-slave model and data flow model.Due to the data flow model The algorithm has high requirements on the divisibility,and it is difficult to achieve the balance of each core.Based on the idea of the master-slave model,this paper proposes a data segmentation method for parallel computing and slave cores,and realizes a more general multi-core parallel computing architecture.Secondly,in order to complete the coordination and communication functions between multiple cores in the system architecture of this article,this article studies multiple implementation methods such as IPC interrupt,shared memory query,and inter-core communication module provided by SYS/BIOS.The first two do not require operating system support,but The functions are imperfect and require high application layer developers,who need operating system support.Therefore,this paper designs a communication method between cores based on message queues,which combines the shared address information of data packets and the data structure of the queue to realize the transmission of variable-length data between cores,and provides corresponding APIs for application layer developers.While reducing the difficulty of development,it can also improve the utilization of storage space.At the same time,this paper also studies the key issues in the process of multi-core software system implementation.Aiming at the process of programming and booting multi-core programs,this paper implements the one-click fusion of multiple compiler files through batch processing.The secondary boot method realizes the startup of multicore,and also provides a feasible solution for the on-track update of multi-core DSP programs.Aiming at the conflict problem of multi-core memory access,this paper proposes a hardware semaphore-based memory access conflict protection mechanism.Finally,based on the image processing algorithm application,the overall operation test of the multi-core parallel computing system is carried out,and the program optimization strategy based on DSP is proposed.The data before and after optimization and the running time consumption data of multi-core are compared to verify the load processing multi-core parallel software studied in this paper.The system can meet the system's operating requirements for image processing algorithms,verify the effectiveness of the design of each module,and enable the load processing system to meet the needs of massive data calculations and parallelization to reduce timeconsuming,and provide implementation for the rapid processing of more satellite data in the future Ideas.