Research On Real-time Transmission And Interface Technology For Embedded System

Industrial control,medical equipment,vehicle electronics and other fields have a large number of embedded system requirements.With the increasing demand for real-time sensor data fusion and signal big data online processing,the embedded system architecture needs to have stronger real-time stream processing and data transmission capabilities.The homogeneous embedded CPU and DSP architectures are often difficult to meet the needs of complex stream data processing scenarios.The heterogeneous architecture based on the combination of FPGA and CPU can take advantage of its flexible customization advantages to achieve high-concurrency preprocessing and complex data transmission.It has the characteristics of low power consumption and good scalability.Facing the needs of high-performance embedded signal processing systems,this thesis proposes a standardized,generalized,flexible and reconfigurable multi-chip FPGA and embedded CPU architecture for transmission links.Aiming at this architecture,this thesis focuses on the research and design of FPGA internal and external interconnection modules,and gives the control and transmission scheme of FPGA and embedded CPU,and realizes the collaboration of FPGA and embedded CPU at the real-time data transmission level.The main work of this thesis is as follows:1)The PCIe link between FPGA and embedded CPU is established and implemented,and then DMA-based data transmission is completed.The command queue method is used to solve the problem of data discontinuity caused by the command processing delay during the streaming transmission process,through flexible settings Sampling amount to balance the bandwidth and real-time performance of data transmission.2)Construct the interconnection infrastructure on the FPGA,including the interconnection of PCIe interface,DMA,and DDR modules.This architecture can realize data transmission in multiple ways without changing the hardware logic,and uses common interfaces plus intermediate modules.The method reduces the coupling depth of the module,and has better flexibility and versatility.3)A high-efficiency AXI protocol interface DMA module is completed.The DMA module can split the AXI transaction of the command,so that the software does not need to consider the issue of the protocol 4K boundary when sending the command.Finally,a test platform was built for testing and verification.The experimental results show that: data transmission of more than 3GB/s can be achieved between FPGA and embedded CPU,and high-bandwidth transmission of more than 14GB/s can be achieved between FPGAs through Aurora.Under the management and control of the embedded CPU,the system can realize real-time streaming data transmission,caching,data playback and other data transmission methods,indicating that the system can realize the coordination and efficient and stable transmission between the processor units,verifying the architecture and transmission scheme The feasibility.