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Design And Reserach On Task Manamement Mechanism Of Heterogenous System Based On RISC-V And Coarse-grained Reconfigurable Array

Posted on:2021-11-21Degree:MasterType:Thesis
Country:ChinaCandidate:P SuFull Text:PDF
GTID:2518306503474634Subject:IC Engineering
Abstract/Summary:PDF Full Text Request
With the rapid development of accelerator design for specific fields,accelerator-based heterogeneous system is the new trend in the development of computing architecture design.However,complex heterogeneous system poses new challenges to programming methods,task scheduling and efficient interactions between processors and accelerators.How to describe computing tasks between the main processor and the accelerator,reduce data transmission cost between the two,and let the processor complete the task management and scheduling of the accelerator efficiently is the key technology to ensure the performance of the heterogeneous systems.In addition,in heterogeneous systems,the task scheduling algorithm has a great impact on the utilization of the accelerator,and a suitable algorithm will make the accelerator perform tasks more efficiently.Existing scheduling algorithms can meet the normal task allocation schemes,but different heterogeneous systems have different requirements for task management and scheduling.Therefore,it is also of great significance to design targeted task scheduling algorithms based on the specific heterogeneous systems.Based on the above situation,aiming at a reconfigurable array driven by data flow,this paper abstracts its working characteristics,driving mode,data flow direction,input and output,etc.A targeted heterogeneous system is designed.The entire system includes the main processor based on RISC-V architecture,the host interface interconnected between the main processor and the reconfigurable array,the task management mechanism,and the task scheduling algorithm.The design of the main processor includes the optimization of the core and the design of the custom instruction set,and the design of the host interface corresponds to the custom instruction set.The task scheduling algorithm comprehensively refers to the advantages of existing algorithms and proposes an algorithm that meets the needs of this topic.At the same time,the task management mechanism of task scheduling in the system is researched and designed.With reference to the existing task management mechanism of embedded system,a task management module for heterogeneous system is designed to further improve the efficiency of task scheduling in heterogeneous systems.At the same time,this paper simulates the task scheduling algorithm on the MATLAB platform.The test results show that the speedup of the scheduling algorithm for heterogeneous systems designed in this paper is3.10%,4.40% and 2.53% higher than the traditional TDS,CPOP,and HEFT algorithms respectively.Apart from this,for the task management mechanism,this article simulates its software design in Emulator,simulates and synthesizes its hardware design part in Vivado software,and implements the proposed RTL circuit on the Xilinx FPGA platform.The test results show that the task management mechanism designed in this paper is light and efficient.Simultaneously,the comprehensive results also show that optimization results of the designed processor have been greatly improved,and the host interface resource consumption is very small,which meet the design requirements.
Keywords/Search Tags:Heterogeneous System, RISC-V ISA, Task Scheduling Algorithm, Host Interface
PDF Full Text Request
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