Research On FPGA-based Convolutional Neural Network Accelerated Computing Method

Convolutional neural network(CNN)has been a great success in many collections,and the demand for a wide range of applications has inevitably increased the depth and capacity of CNN thus triggering a growing interest in using hardware accelerated CNN such as FPGA.The paper researches the FPGA-based method for accelerating the algorithm of CNN and proposes an implementation.The GEMM?FFT?Winograd algorithm were used to optimize the CNN for the problem of large and concentrated computation.To found a solution for the optimization issue of data transfer paths in FPGA and thus improve the overall parallelism of the system,general architecture and data-flow model acceleration schemes were studied and our design solution was improved.Dealing with larger network models results in unnecessary waste of resources in all aspects of the hardware.Therefore,our model and parameters were tuned by optimization on the data form level.Eventually,the design of the module on FPGA achievement hardware accelerated computing.The results show that the CNN's optimization method implemented on FPGA proposed in this paper could achieve improved acceleration consequent meanwhile strengthen resource utilization.The acceleration scheme used a platform with an operating frequency of 50 MHz,and could obtain 22.8 times acceleration when working with ARM.There was a 12 x improvement compared to the initial acceleration solution.Compared to the CPU,the speedup was 23.5 times.The computational power ratio was2.88 times better than the GPU.