Dual-band RFID Tag Chip Analog Front End Research And Design

Radio frequency identification(RFID)is a kind of non-contact automatic identification technology through Radio frequency waves.At present,HF and UHF are two most widely used frequency bands in RFID,mainly including logistics,identification,anti-counterfeiting and transportation.In this paper,design a dual-band RFID tag chip analog front-end circuit compatible with 13.56MHz and 860MHz-960MHz used SMIC 0.18?m EEPROM process.HF meets ISO15693 protocol.UHF meets EPC Class 1 Gen 2 protocol.The power consumption and chip area are reduced by partial circuit multiplexing.First of all,on the basis of HF and UHF energy links,the power circuit of the dual-band RFID tag chip is designed.mainly includes rectifying circuit,limiting circuit and low dropout regulator.The HF rectifying circuit adopts the high efficiency NMOS gate cross rectifying circuit,and the PCE is up to 56.6%.UHF charge pump circuit adopts threshold compensation technology and CTS charge pump structure.The reverse leakage current is reduced.The PCE of single stage charge pump circuit is up to 33.3%.Voltage limiting circuit threshold voltage is about 2.5V.The low dropout regulator supply a power voltage of1.8V,stabilized voltage range is 1.8V-6V,the dropout Voltage is less than 100m V,the maximum load is 80m A,and the I_Q is less than 26?A.Then a demodulation circuit which can satisfy both HF and UHF modes is designed.In HF mode,ASK signals with modulation depths of 10%and 100%can be demodulated.In UHF mode,ASK signal with amplitude of 150m V can be demodulated.The demodulation circuit has high sensitivity.The HF and UHF modulation circuits are designed respectively,and the clock and the reset signal are provided for the digital baseband.Finally,the simulation and test of the analog front-end circuit of dual-band RFID tag chip were carried out.The HF rectifier circuit and modulation circuit function normally,The output frequency of the clock is 13.55MHz,and the error is within the allowable range.The UHF charge pump circuit and demodulation circuit can be normally energized and demodulated,the clock output frequency range is 1.355MHz-4.765MHz,the reset can produce a low level time greater than 2?s reset signal.